期刊論文- Jih-Ching Chiu
| 出版年月 | 著作類別 | 著作名稱 | 作者 | 收錄出處 |
| 2024/1/1 | 期刊論文 | Design and Implementation of Nursing-Secure-Care System with mmWave Radar by YOLO-v4 Computing Methods | Jih-Ching Chiu, Guan-Yi Lee, Chih-Yang Hsieh and Qing-You Lin | Applied Systen Innovation |
| 2020/12/1 | 期刊論文 | 具旋轉之多軸運動平台應用於飛行模擬訓練 | 潘正堂、孫培原、王紹宇、李浩然、邱日清 | 機械新刊 |
| Insight Machinery Magazine | ||||
| 2013/12/1 | 期刊論文 | Two-Dimensional Interpolation-Assisted Channel Prediction for OFDM Systems | Hsuan-Chang Lee, Jih-Ching Chiu and Ken-Huang Lin | IEEE Transactions on Broadcasting |
| 2013/5/1 | 期刊論文 | A relation-exchanging buffering mechanism for instruction and data streaming | Jih-Ching Chiu,Kai-Ming Yang,Yu-Liang Chou,Chih-Kang Wu | Computers and Electrical Engineering |
| 2013/2/1 | 期刊論文 | High-speed low-power multiplexer-based selector for priority policy | Jih-ching Chiu, Kai-ming Yang | Computers and Electrical Engineering |
| 2012/6/1 | 期刊論文 | A hyperscalar dual-core architecture for embedded systems | Jih-Ching Chiu, Kai-Ming Yang and Yu-Liang Chou | Microprocessors and Microsystems, http://dx.doi.org/10.1016/j.micpro.2012.06.011 |
| 2011/12/1 | 期刊論文 | A Unitable Computing Architecture for Chip Multiprocessors | Jih-Ching Chiu, Yu-Liang Chou, Po-Kai Chen and Ding-Siang Su | The Computer Journal |
| 2010/7/1 | 期刊論文 | The Basic Block Reassembling Instruction Stream Buffer with LWBTB for X86 ISA | Jih-Ching Chiu, Yu-Liang Chou and Tseng-Kuei Lin | JOURNAL OF INFORMATION SCIENCE AND ENGINEERING |
| 2010/5/1 | 期刊論文 | A Multi-streaming Multimedia Computing Engine | Jih-Ching Chiu, Yu-Liang Chou, and Shou-Xi Hong | Microprocessors and Microsystems |
| 2010/1/1 | 期刊論文 | A Novel instruction stream buffer for VLIW architectures | Jih-Ching Chiu, Kai-Ming Yang | Computers and Electrical Engineering |
| 2010/1/1 | 期刊論文 | IRES: An integrated software and hardware interface framework for reconfigurable embedded system | J.-C. Chiu T.-L. Yeh | IET Computers and Digital Techniques |
| 2008/5/1 | 期刊論文 | The Multi-context Reconfigurable Processing Unit for Fine-grain Computing | 邱日清 | Journal of Information Science and Engineering |
| 2005/12/1 | 期刊論文 | FMRPU: Design of fine-grain multi-context reconfigurable processing unit | 邱日清 | ADVANCES IN COMPUTER SYSTEMS ARCHITECTURE, PROCEEDINGS LECTURE NOTES IN COMPUTER SCIENCE |
| 2002/5/1 | 期刊論文 | Design of Instruction Address Queue for High Degree X86 Superscalar Architectures | 邱日清 | Journal of Information Science and Engineering |
| 2001/5/1 | 期刊論文 | High-Bandwidth X86 Instruction Fetching Based on Instruction Pointer Table | 邱日清 | IEE Proc. Computers & Digital Techniques |
| 1999/9/1 | 期刊論文 | Instruction cache prefetching directed by branch prediction | 邱日清 | IEE Proc. Computers & Digital Techniques |
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