期刊論文- Chua-Chin Wang
| 出版年月 | 著作類別 | 著作名稱 | 作者 | 收錄出處 |
| 2024/11/1 | 期刊論文 | A 6-Gbps 16-nm FinFET CMOS I/O buffer with variation insensitivity ensured by genetic algorithm | C.-C. Wang, L S S P. K. Chodisetti, J.-Y. Ke, C.-Y. Lo, T.-J. Lee, L. K. S. Tolentino | IEEE Trans. on Circuits and Systems I: Regular Papers |
| 2024/9/1 | 期刊論文 | A 1-6.5 Gbps dual-loop CDR design with coarse-fine tuning VCO and modified DQFD | C.-C. Wang, L S S P. K. Chodisetti, B.-H. Liao, P. Vellanki, T.-J. Lee | Microelectronics Journal |
| 2024/9/1 | 期刊論文 | A 15.13 mW 3.2 GHz 8-bit carry look-ahead adder using single- phase all-N-transistor logic | C.-C. Wang, L S S P. K. Chodisetti, D. S. Kamarajugadda, O. L. J. A. Jose, and P. Vellanki | Integration, the VLSI Journal |
| 2024/7/1 | 期刊論文 | Underwater image enhancement based on light field-guided rendering network | C.-H. Yeh, Y.-W. Lai, Y.-Y. Lin, M.-J. Chen, C.-C. Wang | Journal of Marine Science and Engineering |
| 2024/5/1 | 期刊論文 | A 6.25 MHz 3.4 mW single clock DPWM technique using matrix shift array | O. L. J. A. Jose, V. N. Kolakaluri, R. G. B. Sangalang, L. K. S. Tolentino, C.-C. Wang | IEEE Trans. on Very Large Integration (VLSI) Systems |
| 2024/5/1 | 期刊論文 | A single-chip PFM-controlled LED driver with 0.5% illuminance variation | C.-C. Wang, L S S P. K. Chodisetti, P.-Y. Lou, C.-C.-H. Hung, P. Vellanki, R. G. B. Sangalang, L. K. S. Tolentino | Microelectronics Journal |
| 2024/3/1 | 期刊論文 | A 13.73 ns input time range TDA design based on adjustable current sources using 40-nm CMOS process | C.-C. Wang, O. L. J. A. Jose, L. Lin, L. K. S. Tolentino, R. G. B. Sangalang, A. L. Salvador | Circuits, Systems, and Signal Processing |
| 2024/2/1 | 期刊論文 | A metastable RNG using interleaved NAND- and NOR-based TEROs | C.-C. Wang, L. K. S. Tolentino, S.-W. Lu, R. G. B. Sangalang, O. L. J. A. Jose, T.-J. Lee | International Journal of Electronics Letters |
| 2023/7/1 | 期刊論文 | A 92.95%-efficiency high voltage dual-mode buck converter using 0.5-um HV CMOS process | C.-C. Wang, L. K. S. Tolentino, P.-C. Chen, R. G. B. Sangalang, O. L. J. A. Jos | International Journal of Electronics |
| 2023/7/1 | 期刊論文 | A negative voltage generator with 4-stage configurable parallel switching | C.-C. Wang, L. K. S. Tolentino, H.-C. Wu, R. G. B. Sangalang, O. L. J. A. Jose, T.-H. Lin | International Journal of Electronics Letters |
| 2023/6/1 | 期刊論文 | A 210-MHz 4.23 fJ energy/bit 1-kb asymmetrical Schmitt-trigger-based SRAM Using 40-nm CMOS Process | R. G. B. Sangalang, S. Reddy, L. K. S. Tolentino, Y.-W. Shen, O. L. J. A. Jose, C.-C. Wang | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2023/5/1 | 期刊論文 | A 2xVDD digital output buffer with gate driving stability and non-overlapping signaling control for slew-rate auto-adjustment using 16-nm FinFET CMOS process | C.-C. Wang, L. K. S. Tolentino, S.-W. Lu, O. L. J. A. Jose, R. G. B. Sangalang, T.-J. Lee, P.-Y. Lou, W.-C. Chang | Integration, the VLSI Journal |
| 2023/1/1 | 期刊論文 | A 1.0 fJ energy/bit single-ended 1-kb 6T SRAM implemented using 40-nm CMOS process | C.-C. Wang, R. G. B. Sangalang, I.-T. Tseng, Y.-J. Chiu, Y.-C. Lin, O. L. J. A. Jos | IET Circuits, Devices & Systems |
| 2022/12/1 | 期刊論文 | A 40.96-GOPS 196.8-mW digital logic accelerator used in DNN for underwater object recognition | C.-C. Wang, R. G. B. Sangalang, C.-P. Kuo, H.-C. Wu, Y. Hsu, S.-F. Hsiao, C.-H. Yeh | IEEE Trans. on Circuits and Systems I: Regular Papers |
| 2022/11/1 | 期刊論文 | A 16-nm FinFET 28.8-mW 800-MHz 8-bit all-N-transistor logic carry look-ahead adder | C.-C. Wang, O. L. J. A. Jose, W.-S. Yang, R. G. B. Sangalang, L. K. S. Tolentino, T. -J. Lee | Circuits, Systems, and Signal Processing |
| 2022/11/1 | 期刊論文 | Lightweight deep neural network for joint learning of underwater object detection and color conversion | C.-H. Yeh, C.-H. Lin, L.-W. Kang, C.-H. Huang, M.-H. Lin, C.-Y. Chang, C.-C. Wang | IEEE Trans. on Neural Networks and Learning Systems |
| 2022/10/1 | 期刊論文 | Analysis of layout arrangement for CMOS oscillators to reduce overall variation on silicon | P.-Y. Lou, Y.-Y. Ho, C.-C. Wang, W.-C. Chang | Advances in Science, Technology and Engineering Systems Journal |
| 2022/9/1 | 期刊論文 | A 2.71 fJ/conversion-step 10-bit 50 MSPS split-capacitor array SAR ADC for FOG systems | C.-C. Wang, R. G. B. Sangalang, M.-J. Wu, T.-J. Lee, Y.-J. Chen, L. K. S. Tolentino, O. L. J. A. Jose | International Journal of Electronics |
| 2022/6/1 | 期刊論文 | A 100-MHz 3.352-mW 8-bit shift register using low-power DETFF using 90-nm CMOS process | C.-C. Wang, L. K. S. Tolentino, U. K. N. Ekkurthi, P.-Y. Lou, S. Sampath | Inter. Journal of Electronics Letters |
| 2022/5/1 | 期刊論文 | A CMOS on-chip high-precision PVTL detector | P.-Y. Lou, Y.-X. Chen, C.-C. Wang, W.-C. Chang | Advances in Science, Technology and Engineering Systems Journal |
| 2022/5/1 | 期刊論文 | Single-chip DC-DC buck converter design based on PWM with high-efficiency in light load | C.-C. Wang, O. L. J. A. Jose, P.-Y. Lou, C.-J. Hsu, L. K. S. Tolentino, R. G. B. Sangalang | International Journal of Electronics Letters |
| 2021/12/1 | 期刊論文 | A 40-nm CMOS multifunctional computing-in-memory (CIM) using single-ended disturb-free 7T 1Kb SRAM | C.-C. Wang, L. K. S. Tolentino, C.-Y. Huang, C.-H. Yeh | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2021/12/1 | 期刊論文 | A single-ended low power 16-nm FinFET 6T SRAM design with PDP reduction circuit | C.-C. Wang, R. G. B. Sangalang, I.-T. Tseng | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2021/12/1 | 期刊論文 | An adaptive constant current and voltage mode P&O-based maximum power point tracking controller IC using 0.5-µm HV CMOS | C.-C. Wang, O. L. J. A. Jose, P.-K. Su, L. K. S. Tolentino, R. G. B. Sangalang, J. S. Velasco, T.-J. Lee | Microelectronics Journal |
| 2021/9/1 | 期刊論文 | 200-MHz single-ended 6T 1-kb SRAM with 0.2313 pJ energy/access Using 40-nm CMOS logic process | C.-C. Wang, C.-P. Kuo | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2021/8/1 | 期刊論文 | 0.7% error rate 3A bidirectional current sensor using high voltage CMOS process | C.-C. Wang, P.-Y. Lou, Z.-Y. Hou, H.-C. Tsai | Microelectronics Journal |
| 2021/6/1 | 期刊論文 | 2xVDD digital output buffer with optimal driver transistor sizing for slew rate self-adjustment and leakage reduction using 28-nm 500 MHz CMOS process | C.-C. Wang, P.-Y. Lou, T.-Y. Tsai, Y.-Y. Chou, T.-J. Lee | Circuits, Systems, and Signal Processing |
| 2021/3/1 | 期刊論文 | A 40-nm CMOS piezoelectric energy harvesting IC for wearable biomedical applications | C.-C. Wang, L. K. S. Tolentino, P.-C. Chen, J. Hizon, C.-K. Yen, C.-T. Pan, Y.-H. Hsueh | electronics |
| 2021/3/1 | 期刊論文 | High-accuracy impedance read-out circuit for BIA-type biomedical sensors | C.-C. Wang, P.-Y. Lou, T.-Y. Tsai, I.-Y. Huang, Y.-C. Lin, T.-J. Lee, G.-R. Chen | Circuits, Systems, and Signal Processing |
| 2021/2/1 | 期刊論文 | Tutorial : Design of high-speed nano-scale CMOS mixed-voltage digital I/O buffer with high reliability to PVTL variations | C.-C. Wang | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2020/11/1 | 期刊論文 | A slew rate enhanced 2×VDD I/O buffer with precharge timing technique | T.-J. Lee, S.-W. Huang, C.-C. Wang | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2020/9/1 | 期刊論文 | Anti-PVT-variation low-power time-to-digital converter design using 90-nm CMOS process | C.-C. Wang, K.-Y. Chao, S. Sampath, P. Suresh, | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2020/6/1 | 期刊論文 | 2-GHz 2xVDD 28-nm CMOS digital output buffer with slew rate auto-adjustment against process and voltage variations | C.-C. Wang, Z.-Y. Hou, Y.-L. Deng, U.-F. Chio, W. Wang | Journal of Circuits, Systems, and Computers (JCSC) |
| 2020/6/1 | 期刊論文 | A single-ended 28 nm CMOS 6T SRAM design with read-assist path and PDP reduction circuitry | C.-C. Wang, Z.-Y. Hou, D.-S. Wang, C.-L. Hsieh | Journal of Circuits, Systems, and Computers (JCSC) |
| 2019/10/1 | 期刊論文 | 74-dBc 71-MHz 4-stage Pipeline ROM-less DDFS Using Factorized 2nd-order Parabolic Equations | C.-C. Wang, P.-Y. Lou, T.-Y. Tsai, H.-Y. Shih | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2019/7/1 | 期刊論文 | Temperature-to-frequency converter with 1.47% error using thermistor linearity calibration | C.-C. Wang, Z.-Y. Hou, J.-C. You | IEEE Sensors Journal |
| 2019/6/1 | 期刊論文 | Power-effective ROM-less DDFS design approach with high SFDR performance | C.-C. Wang, N. Sulistiyanto, H.-Y. Shih, Y.-C. Lin, W. Wang | Journal of Signal Processing Systems |
| 2019/1/1 | 期刊論文 | A slew rate variation compensated 2xVDD I/O buffer using deterministic P/N-PVT variation detection method | T.-J. Lee,T.-Y. Tsai, W. Lin, U.-F. Chio, C.-C. Wang | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2018/9/1 | 期刊論文 | 56.67 fJ/bit single-ended disturb-free 5T loadless 4 kb SRAM using 90 nm CMOS technology | C.-C. Wang, D.-S. Wang, S.-Y. Chen | Analog Integrated Circuits and Signal Processing |
| 2018/8/1 | 期刊論文 | A 90-nm CMOS 800 MHz 2xVDD output buffer with leakage detection and output current self-adjustment | C.-C. Wang, T.-Y. Tsai, W. Lin | Analog Integrated Circuits and Signal Processing |
| 2018/7/1 | 期刊論文 | A high-precision CMOS temperature sensor with thermistor linear calibration in the (−5 °C, 120 °C) temperature range | C.-C. Wang, Z.-Y. Hou, J.-C. You | Sensors |
| 2018/3/1 | 期刊論文 | A lock detector loop for low-power PLL-based clock and data recovery circuits | C.-C. Wang, Z.-Y. Hou, C.-L. Chen, D. Shmilovitz | Circuits, Systems & Signal Processing |
| 2017/11/1 | 期刊論文 | A dynamic leakage and slew Rate compensation circuit for 40-nm CMOS mixed-voltage output buffer | T.-J. Lee, T.-Y. Tsai, W. Lin, U.-F. Chio, and C.-C. Wang | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2017/11/1 | 期刊論文 | A readout circuit with cell output slew rate compensation for 5T single-ended 28 nm CMOS SRAM | D.-S. Wang, Y.-H. Su, C.-C. Wang | Microelectronics Journal |
| 2017/11/1 | 期刊論文 | Highly Sensitive FPW-Based Microsystem for Rapid Detection of Tetrahydrocannabinol in Human Urine | Je-Wei Lan, Chia-Hsu Hsieh, I-Yu Huang, Yu-Cheng Lin, Tsung-Yi Tsai, Chua-Chin Wang | Sensors |
| 2017/8/1 | 期刊論文 | A lock detector loop for low-power PLL-based clock and data recovery circuits | C.-C. Wang, Z.-Y. Hou, C.-L. Chen, D. Shmilovitz | Circuits, Systems, and Signal Processing |
| 2017/7/1 | 期刊論文 | 2 x VDD 40-nm CMOS Output Buffer with Slew Rate Self-adjustment Using Leakage Compensation | C.-C. Wang, Z.-Y. Hou, and K.-W. Ruan, | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2017/2/1 | 期刊論文 | A 19.38 dBm OIP3 Gm-boosted Up-conversion CMOS Mixer for 5-6 GHz Application | W.-H. Huang, I.-Y. Huang, Y.-S. Tseng, C.-H. Hsieh, C.-C. Wang | Microelectronics Journal |
| 2017/1/1 | 期刊論文 | 2xVDD output buffer with 36.4% slew rate improvement using leakage current compensation | C.-C. Wang, T.-Y. Tsai, T.-J. Lee, and K.-W. Ruan | Electronics Letters |
| 2016/11/1 | 期刊論文 | High-voltage on-chip current sensor design and analysis for battery modules | C.-C. Wang, Z.-Y. Hou, W.-J. Lu, and S.-S. Wang | IET Circuits, Devices & Systems |
| 2016/5/1 | 期刊論文 | A leakage compensation design for low supply voltage SRAM | C.-C. Wang, D.-S. Wang, C.-H. Liao, S.-Y. Chen | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2015/8/1 | 期刊論文 | A 30 V rail-to-rail operational amplifier | Chua-Chin Wang, Tsung-Yi Tsai,Wen-Je Lu,Chih-Lin Chen,Yi-Lun Wu | Microelectronics Journal |
| 2015/7/1 | 期刊論文 | Wide-range CTAT and PTAT sensors with second-order calibration for on-chip thermal monitoring | Chua-Chin Wang, Wen-Je Lu, Tzu-Chao Wu | Microelectronics Journal |
| 2015/4/1 | 期刊論文 | A +/- 3.07% frequency variation clock generator implemented using HV CMOS process | Chua-Chin Wang, Deng-Shian Wang, Tzu-Chiao Sung, Yi-Jie Hsieh, Tzung-Je Lee | Microelectronics Journal |
| 2015/3/1 | 期刊論文 | A 60V tolerance transceiver with ESD protection for FlexRay-based communication systems | C.-C. Wang, C.-L. Chen, Z.-Y. Hou, Y. Hu, J.-W. Lee, W.-Y. Lin, Y.-F. Chang, C.-W. Hsu, and M.-H. Song | IEEE Trans. on Circuits & Systems - I (TCAS-I) |
| 2015/3/1 | 期刊論文 | Analysis of calibrated on-chip temperature sensor with process compensation for HV chips | C.-C. Wang, W.-J. Lu, and T.-Y. Tsai | IEEE Trans. on Circuits & Systems - II (TCAS-II) |
| 2015/2/1 | 期刊論文 | A voltage monitoring IC with HV multiplexer and HV transceiver for battery management systems | C.-L. Chen, D.-S. Wang, J.-J. Li, and C.-C. Wang | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2015/1/1 | 期刊論文 | Process corner detection by skew inverters for 500 MHz 2xVDD output buffer using 40-nm CMOS technology | C.-C. Wang, W.-J. Lu, K.-W. Juan, Wei Lin, H.-Y. Tseng, C.-Y. Juan | Microelectronics Journal |
| 2014/12/1 | 期刊論文 | A +/-10.5 V 16-channel programmable pulse generator using high-voltage BCD CMOS process | C.-C. Wang, D.-S. Wang, T.-C. Sung, Y.-H. Wu, and D. Shmilovitz | Electronics Letters |
| 2014/4/1 | 期刊論文 | Noninvasive control of the power transferred to an implanted device by an ultrasonic transcutaneous energy transfer link | D. Shmilovitz, S. Ozeri, C.-C. Wang, and B. Spivak | IEEE Trans. on Biomedical Engineering |
| 2014/2/1 | 期刊論文 | A FlexRay transceiver design with Bus Guardian for in-car networking systems compliant with FlexRay standard | C.-C. Wang*, C.-L. Chen, G.-N. Sung, C.-L. Wang, C.-Y. Juan | J. of Signal Processing Systems |
| 2013/6/1 | 期刊論文 | On-chip process and temperature monitor for self-adjusting slew rate control of 2 x VDD output buffers | C.-C. Wang, C.-L. Chen, R.-C. Kuo, H.-Y. Tseng, J.-W. Liu, C.-Y. Juan | IEEE Trans. on Circuits & Systems - I (TCAS-I) |
| 2013/5/1 | 期刊論文 | A 2×VDD output buffer with PVT detector for slew rate compensation | C.-C. Wang, W.-J. Lu, C.-L. Chen, H.-Y. Tseng, R.-C. Kuo, C.-Y. Juan | Microelectronics Journal |
| 2013/4/1 | 期刊論文 | A low-power transceiver design for FlexRay-based communication systems | Chua-Chin Wang, Chih-Lin Chen, Jie-Jyun Li, Gang-Neng Sung, Tai-Hao Yeh, Chun-Ying Juan | Microelectronics Journal |
| 2013/1/1 | 期刊論文 | A 800 Mbps and 12.37 ps jitter bidirectional mixed-voltage I/O buffer with dual-path gate-tracking circuit | C.-C. Wang, C.-L. Chen, H.-Y. Tseng, H.-H. Hou, C.-Y. Juan | IEEE Trans. on Circuits & Systems – I (TCAS-I) |
| 2013/1/1 | 期刊論文 | A Protein Concentration Measurement System Using a Flexural Plate-Wave Frequency-Shift Readout Technique | Chua-Chin Wang, Tzu-Chiao Sung, Chia-Hao Hsu, Yue-Da Tsai, Yun-Chi Chen, Ming-Chih Lee, I-Yu Huang | Sensors |
| 2012/7/1 | 期刊論文 | A single-chip 60-V bulk charger for series Li-ion batteries with smooth charge-mode transition | S.-H. Yang, J.-W. Liu, C.-C. Wang* | IEEE Trans. on Circuits & Systems - I : Regular Papers |
| 2012/4/1 | 期刊論文 | A low power 48-dB/stage linear-in-dB variable gain amplifier for direct-conversion receivers | S.-H. Yang, C.-C. Wang* | Microelectronics Journal |
| 2012/4/1 | 期刊論文 | Feed-forward output swing prediction AGC design with parallel-detect singular-store peak detector | S.-H. Yang, C.-C. Wang* | Microelectronics Journal |
| 2012/3/1 | 期刊論文 | Development of a flexural plate-wave (FPW) Immunoglobulin-E (IgE) allergy bio-sensing microsystem | I.-Y. Huang, M.-C. Lee, C.-H. Hsu, C.-C. Wang | Sensors & Actuators: B. Chemical |
| 2011/10/1 | 期刊論文 | One-time implantable spinal cord stimulation system prototype | C.-H. Hsu, S.-B. Tseng, Y.-J. Hsieh, and C.-C. Wang* | IEEE Trans. on Biomedical Circuits and Systems |
| 2011/8/1 | 期刊論文 | A wide voltage range digital I/O design using gated floating N-well circuit | C.-C. Wang, C.-H. Hsu, S.-C. Liao, Y.-C. Liu | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2011/7/1 | 期刊論文 | A High Precision Low Dropout Regulator with Nested Feedback Loops | C.-C. Wang*, R.-C. Kuo, T.-H. Tsai | Microelectronics Journal |
| 2011/5/1 | 期刊論文 | A high-ffficiency DC-DC buck converter for sub-2xVDD power supply | C.-C. Wang, C.-L. Chen, G.-N. Sung, C.-L. Wang | Microelectronics Journal |
| 2010/10/1 | 期刊論文 | A signed array multiplier with bypassing logic | C.-C. Wang*, C.-H. Hsu, G.-N. Sung, and Y.-C. Lu | J. of Signal Processing Systems |
| 2010/9/1 | 期刊論文 | Energy-efficient double-edge triggered flip-flop | C.-C. Wang*, G.-N. Sung, M.-K. Chang, Y.-Y. Shen | J. of Signal Processing Systems |
| 2010/8/1 | 期刊論文 | 0.9 V to 5 V bidirectional mixed-voltage I/O buffer with an ESD protection output stage | C.-C. Wang*, R.-C. Kuo, J.-W. Liu | IEEE Trans. on Circuits & Systems - II |
| 2010/8/1 | 期刊論文 | All digital frequency synthesizer using a flying adder | G.-N. Sung, S.-C. Liao, G.-N. Sung, J.-M. Huang, Y.-C. Lu, C.-C. Wang* | IEEE Trans. on Circuits & Systems - II |
| 2010/7/1 | 期刊論文 | A 1/2 X VDD to 3 X VDD bidirectional I/O buffer with a dynamic gate bias generator | C.-C. Wang*, C.-H. Hsu, Y.-C. Liu | IEEE Trans. on Circuits & Systems - I |
| 2010/6/1 | 期刊論文 | Ultrasonic transcutaneous energy transfer using a continuous wave 650 kHz Gaussian shaded transmitter | S. Ozeri, D. Shmilovitz*, S. Singer, C.-C. Wang | Ultrasonics |
| 2010/5/1 | 期刊論文 | A ROM-less DDFS based on a parabolic polynomial interpolation method with an offset | C.-C. Wang*, C.-H. Hsu, C.-C. Lee, J.-M. Huang | J. of Signal Processing Systems |
| 2010/5/1 | 期刊論文 | A linear LDO regulator with modified NMCF frequency compensation independent of off-chip capacitor and ESR | C.-C. Wang*, C.-C. Huang, U. F. Chio | Analog Integrated Circuits and Signal Processing |
| 2010/5/1 | 期刊論文 | Guest Editorial : Special Issue on ISCAS 2009 | C.-C. Wang, F. Lustenberger, Y. Massoud, W. A. Serdijn* | IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS |
| 2010/4/1 | 期刊論文 | Self-sampled all-MOS ASK demodulator for lower ISM band applications | C.-C. Wang*, C.-L. Lin, R.-C. Kuo, and D. Shmilovitz | IEEE Trans. on Circuits & Systems - II |
| 2010/3/1 | 期刊論文 | A low-power 2.45 GHz WPAN modulator/demodulator | C.-C. Wang*, G.-N. Sung, J.-M. Huang, L.-H. Lee, C.-P. Li | Microelectronics Journal |
| 2010/2/1 | 期刊論文 | 1/3 VDD to 3/2 VDD wide-range I/O buffer using 0.35-um 3.3-V CMOS technology | C.-C. Huang, T.-J. Lee, W.-C. Chang, *C.-C. Wang | IEEE Trans. on Circuits & Systems - II : Brief Papers |
| 2010/2/1 | 期刊論文 | A transceiver frontend for electronic control units in FlexRay-based automotive communication systems | C.-C. Wang, G.-N. Sung, P.-C. Chen, C.-L. Wey | IEEE Trans. on Circuits & Systems - I : Regular Papers |
| 2010/1/1 | 期刊論文 | A self-disabled sensing technique for content-addressable memories | C.-C. Wang, C.-H. Hsu, C.-C. Huang, J.-H. Wu | IEEE Trans. on Circuits & Systems - II : Brief Papers |
| 2009/12/1 | 期刊論文 | Low-power multiplier design using a bypassing technique | C.-C. Wang*, G.-N. Sung | J. of Signal Processing Systems |
| 2009/7/1 | 期刊論文 | A high-SFDR direct digital frequency synthesizer with embedded error-compensation CMOS OTP ROM for wireless receivers | C.-C. Huang, G.-L. Jhuang, C.-C. Wang* | Microwave and Optical Technology Letters |
| 2009/4/1 | 期刊論文 | Wide-range 5.0/3.3/1.8 V I/O buffer using 0.35-um 3.3-V CMOS technology | T.-J. Lee, T.-Y. Chang, C.-C. Wang* | IEEE Trans. on Circuits & Systems - I : Regular Papers |
| 2009/3/1 | 期刊論文 | High-PSR sync separator for TV signals | Chua-Chin Wang*, C.-H. Hsu, C.-C. Huang, T.-J. Lee, C.-C. Hung, Y.-H. Hsueh, R. Hu | Analog Integrated Circuits and Signal Processing |
| 2009/1/1 | 期刊論文 | Baseband receiver design for the MBOA ultra wideband wireless personal area networks | S.-H. Wang, C.-P. Li, C.-T. Yu, J.-M. Huang, and C.-C. Wang* | IEICE Trans. on Commun. |
| 2008/12/1 | 期刊論文 | A Phase-Locked Loop with 30% Jitter Reduction Using Separate Regulators | T.-J. Lee, C.-C. Wang* | Inter. J. of VLSI Design |
| 2008/11/1 | 期刊論文 | A 1.7-ns access time SRAM using variable bulk bias wordline-controlled transistors | C.-C. Wang*, G.-N. Sung, C.-C. Huang, C.-L. Lee, T.-H. Chen, W.-J. Lin, and R. Hu | Journal of Circuits, Systems, and Computers |
| 2008/9/1 | 期刊論文 | A CMOS opto-electronic single chip using the hybrid scheme for optical receivers | J.-M. Huang, C.-C. Wang*, Yi-Jen Chiu | Microwave and Optical Technology Letters |
| 2008/8/1 | 期刊論文 | Power-aware design of an 8-bit pipelining ANT-based CLA using data transition detection | C.-C. Wang*, G.-N. Sung, P.-L. Liu | Journal of Signal Processing Systems |
| 2008/7/1 | 期刊論文 | ZigBee 868/915 MHz modulator/demodulator for wireless personal area network | C.-C. Wang*, C.-C. Huang, J.-M. Huang, C.-Y. Chang. C.-P. Li | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2008/6/1 | 期刊論文 | 70 dB dynamic range CMOS wideband digital variable gain amplifier for AGC in DVB-T/H receivers | C.-C. Wang*, C.-C. Huang, C.-L. Lee, L.-P. Lin, Y.-L. Tseng | Circuits Systems and Signal Processing |
| 2008/5/1 | 期刊論文 | A Low Power High-Speed 8-Bit Pipelining CLA Design Using Dual-Threshold Voltage Domino Logic | C.-C. Wang*, C.-C. Huang, C.-L. Lee, T.-W. Cheng | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2008/5/1 | 期刊論文 | A low-power ADPLL using feedback DCO quaterly disabled in time domain | C.-C. Wang*，C.-C. Huang，S.-L. Tseng | Microelectronics Journal |
| 2008/5/1 | 期刊論文 | All-MOS ASK demodulator for low-frequency applications | T.-J. Lee, C.-L. Lee, Y.-J. Chiu, C.-C. Huang, C.-C. Wang* | IEEE Trans. on Circuits & Systems - II |
| 2008/3/1 | 期刊論文 | A mini-invasive long-term bladder urine pressure measurement ASIC and system | C.-C. Wang*, C.-C. Huang, J.-S. Liou, Y.-J. Ciou, I.-Y. Huang, C.-P. Li, Y.-C. Lee, W.-J. Wu | IEEE Trans. on Biomedical Circuits and Systems |
| 2008/3/1 | 期刊論文 | Development of an implantable wireless biomicrosystem with impedance spectroscopy measurement and nerve stimulation functions | Y.-T. Li, C.-H. Lin, C.-C. Wang, J.-J. J. Chen | International Journal of Electrical Engineering |
| 2008/1/1 | 期刊論文 | A 570-kbps ASK demodulator without external capacitors for low-frequency wireless bio-implants | C.-C. Wang*, T.-J. Lee, U. F. Choi, Y.-T. Hsiao, J.-J. J. Chen | Microelectronics Journal |
| 2008/1/1 | 期刊論文 | A single-chip CMOS IF-band converter design for DVB-T receivers | C.-C. Wang*, C.-C. Huang, C.-L. Lee, C.-C. Hung, L.-P. Lin | Microelectronics Journal |
| 2007/10/1 | 期刊論文 | An interference cancellation scheme for carrier frequency offsets compensation in the uplink of OFDMA systems | S.-H. Wang, C.-P. Li*, and C.-C. Wang | Inter. J. of Electrical Engineering |
| 2007/6/1 | 期刊論文 | An 80 MHz PLL with 72.7-ps peak-to-peak jitter | Chua-Chin Wang*, G.-N. Sung, J.-M. Huang, L.-P. Lin | Microelectronics Journal |
| 2007/5/1 | 期刊論文 | A 4-Kb low power SRAM design with negative word-line scheme | 王朝欽*, 李景立, 林文吉 | IEEE Trans. on Circuits and Systems – I : Fundamental Theory and Applications |
| 2007/2/1 | 期刊論文 | Voltage-to-frequency converter with high sensitivity using all-MOS voltage window comparator | 王朝欽 | Microelectronics Journal |
| 2006/11/1 | 期刊論文 | Clock and data recovery design for LVDS transceiver used in LCD panels | 王朝欽 | IEEE Trans. on Circuits and Systems – II |
| 2006/10/1 | 期刊論文 | A phase-adjustable pipelining ROM-less direct digital frequency synthesizer | 王朝欽 | IEEE Trans. on Circuits and Systems – II |
| 2006/8/1 | 期刊論文 | An all-MOS high linearity voltage-to-frequency converter chip with 520 KHz/V sensitivity | 王朝欽 | IEEE Trans. on Circuits and Systems – II |
| 2006/2/1 | 期刊論文 | High-sensitivity and high-mobility compact DVB-T receiver for in-car entertainment | Chua-Chin Wang, Tzung-Je Lee, Hoi Kam Lo, Shih-Ping Lin, Ron Hu | IEEE Trans. on Consumer Electronics |
| 2005/12/1 | 期刊論文 | A multiparameter implantable microstimulator SOC | Chua-Chin Wang, Tzung-Je Lee, Yu-Tzu Hsiao, U.F. Chio, Chi-Chun Huang, J.-J.J. Ya-Hsin Hsueh | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2005/8/1 | 期刊論文 | Low-power small-area digital I/O cell | 王朝欽 | IEEE Trans. on Circuits and Systems – II |
| 2005/6/1 | 期刊論文 | Switched-current 3-bit CMOS 4.0-MHz wideband random signal generator | 王朝欽 | IEEE Journal of Solid-State Circuits |
| 2005/5/1 | 期刊論文 | Low-cost video decoder with 2D2L comb filter for NTSC digital TVs | 王朝欽 | IEEE Transactions on Consumer Electronics |
| 2005/3/1 | 期刊論文 | A temperature-insensitive self-recharging circuitry used in DRAMs | 王朝欽 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| 2005/2/1 | 期刊論文 | A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers | 王朝欽 | IEEE Transactions on Consumer Electronics |
| 2005/2/1 | 期刊論文 | An implantable bi-directional wireless transmission system for transcutaneous biological signal recording | C.-K. Liang, J.-J. J. Chen, C.-L. Chung, C.-L. Cheng and C.-C. Wang* | Physiological Measurement |
| 2005--- | 期刊論文 | Development of wireless biomicrosystem for measuring electrode-tissue impedance | Y. T. Li, J.-J. Jason Chen, C. H. Chang, C.-C. Wang*, and C. K. Liang | Journal of Medical and Biological Engineering |
| 2004/12/1 | 期刊論文 | A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications | 王朝欽 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| 2004/11/1 | 期刊論文 | Baseband design of a wireless transceiver for implantable neural interface | C.-C. Wang*, T.-J. Lee, Y.-H. Hsueh, Y.-T. Hsiao, and U F. Chio | International Journal of Chinese Institute of Electrical Engineering |
| 2004/9/1 | 期刊論文 | A 13-bit resolution ROM-less direct digital frequency synthesizer based on a trigonometric quadruple angle formula | C.-C. Wang, Y.-L. Tseng, H.-C. She, C.-C. Li, and R. Hu | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2004/9/1 | 期刊論文 | A 4-Kb 500-MHz 4-T CMOS SRAM using low-Vthn bitline drivers and high-Vthp latches | C.-C. Wang, Y.-L. Tseng, H.-Y. Leo, and R. Hu | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2003/10/1 | 期刊論文 | An SRAM Design Using Dual Threshold Voltage Transistors and Low-Power Quenchers | C.-C. Wang, P.-M. Lee, and K.-L. Chen | IEEE J. of Solid-State Circuits |
| 2003/9/1 | 期刊論文 | A 1.25 GHz 32-bit tree-structured carry lookahead adder using modified ANT logic | C.-C. Wang, Y.-L. Tseng, P.-M. Lee, R.-C. Lee, and C.-J. Huang | IEEE Trans. on Circuits and Systems -- I Fundamental Theory and Applications |
| 2003/9/1 | 期刊論文 | High fan-in dynamic CMOS comparators with low transistor count | 王朝欽 | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications |
| 2003/8/1 | 期刊論文 | An area-saving decoder structure for ROMs | 王朝欽 | IEEE Transactions on Very Large Scale Integration (VLSI) Systems |
| 2003/8/1 | 期刊論文 | Design of a cycle-efficient 64-b/32-b integer divisor using a table-sharing algorithm | C.-C. Wang*, P.-M. Lee, J.-J. Wang, and C.-J. Huang | IEEE Trans. on Very Large Scale Integration (VLSI) Systems |
| 2003/7/1 | 期刊論文 | A fast bipolar-valued inner product processor chip for associative memory networks | 王朝欽 | IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications |
| 2002/11/1 | 期刊論文 | A low-cost plasma display panel data dispatcher for image enhancement | C.-C. Wang, Y.-H. Hseuh, C.-S. Chen, and J.-F. Huang | IEEE Trans. on Consumer Electronics |
| 2002/6/1 | 期刊論文 | A fast dynamic 64-bit comparator with small transistor count | C.-C. Wang*, Y.-H. Hsueh, H.-L. Wu, and C.-F. Wu | Inter. J. of VLSI Design |
| 2002/6/1 | 期刊論文 | Design of an inter-plane circuit for clocked PLAs | C.-C. Wang*, Y.-H. Hsueh, Y.-T. Chien, and Y.-P. Chen | Inter. J. of VLSI Design |
| 2002/6/1 | 期刊論文 | Improved Design of C2PL 3-2 compressors for Inner Product Processing | C.-C. Wang*, P.-M. Lee, and C.-J. Huang | Inter. J. of VLSI Design |
| 2002/3/1 | 期刊論文 | An embedded low transistor count 8-bit analog-to-digital converter using a binary searching method | C.-C. Wang*, Y.-H. Hsueh, and S.-K. Huang | Inter. J. of VLSI Design |
| 2002/3/1 | 期刊論文 | Image processing techniques for wafer defect cluster identification | C.-J. Huang, C.-C. Wang*, and C.-F. Wu | IEEE Design and Test of Computer |
| 2001/10/1 | 期刊論文 | Man-machine interface modules for wireless ARM-based handsets (1/3) | C.-C. Wang*, H.-L. Wu, and R.-C. Lee | Engineering, Science, and Technology Bulletin |
| 2001/3/1 | 期刊論文 | Pattern recognition by high-capacity polynomial bidirectional hetero-associative network | C.-C. Wang*, C.-F. Tsai, and Y.-T. Chien | Journal of Information Science and Engineering |
| 2001/2/1 | 期刊論文 | A ratioed channel assignment scheme for initial and handoff calls in mobile cellular systems | C.-J. Huang, W. K. Lai, C.-C. Wang*, Y.-J. Jin, and H. W. Chen | Computer Communications |
| 2000/12/1 | 期刊論文 | Design and analysis of Radix-8/4/2 64b/32b integer divider using COMPASS Cell library | C.-C. Wang*, C.-J. Huang, and I.-Y. Chang | Inter. J. of VLSI Design |
| 2000/12/1 | 期刊論文 | Design and analysis of digital ratioed compressors for inner product processing | C.-C. Wang*, C.-J. Huang, and P.-M. Lee | Inter. J. of VLSI Design |
| 2000/11/1 | 期刊論文 | A deterministic capacity-finding method for multi-valued exponential BAM | C.-C. Wang*, C.-J. Huang, and S.-M. Hwang | IEEE Trans. on Systems, Man, and Cybernetics |
| 2000/11/1 | 期刊論文 | Design of an inner-product processor for hardware realization of multi-valued exponential bidirectional associative memory | C.-C. Wang*, C.-J. Huang, and Y.-P. Chen | IEEE Trans. of Circuits and Systems, Part II : Analog and Digital Signal Processing |
| 2000/9/1 | 期刊論文 | A low-cost quadrature decoder/counter interface integrated circuit for AC induction motor server control | C.-C. Wang*, P.-M. Lee, Y.-L. Tseng, and C.-F. Wu | Inter. J. of Electronics |
| 2000/8/1 | 期刊論文 | Analysis of practical expectation of the capacity of PBHC with fault tolerance | C.-C. Wang* and C.-F. Tsai | IEEE Trans. on Circuits and Systems - I: Fundamental Theory and Applications |
| 2000/6/1 | 期刊論文 | A practical load-optimized VCO design for low-jitter 5V 500 MHz digital phase-locked loop | C.-C. Wang*, Y.-T. Chien, and Y.-P. Chen | Inter. J. of VLSI Design |
| 2000/3/1 | 期刊論文 | Cell-based implementation of Radix-4/2 64b dividend 32b divisor signed integer divider using the COMPASS cell library | C.-C. Wang*, C.-J. Huang, G.-C. Lin, and C.-F. Wu | IEE Proceedings - Computers and Digital Techniques |
| 2000/3/1 | 期刊論文 | Three alternative architecture of digital ratioed compressor design with application to inner produc processing | C.-C. Wang*, P.-M. Lee, and C.-J. Huang | IEE Proceedings - Computers and Digital Techniques |
| 2000/2/1 | 期刊論文 | A 1.0 GHz 0.6-µm 8-bit carry lookahead adder using PLA-styled all-N-transistor logic | C.-C. Wang*, C.-J. Huang, and K.-C. Tsai | IEEE Trans. of Circuits and Systems, Part II : Analog and Digital Signal Processing |
| 2000/1/1 | 期刊論文 | Single-ended SRAM with high test coverage and short test time | C.-C. Wang*, C.-F. Wu, R.-T. Hwang, and C.-H. Kao | IEEE J. of Solid-State Circuits |
| 2000--- | 期刊論文 | Fuzzy data processing using polynomial bidirectional hetero-associative network | C.-C. Wang*, and C.-F. Tsai | Information Sciences |
| 1999/11/1 | 期刊論文 | Polynomial bidirectinal hetero-correlator | C.-C. Wang* and C.-F. Tsai | Electronics Letters |
| 1999/9/1 | 期刊論文 | In-sawing-lane multi-level BIST for known good dies of LCD drivers | C.-C. Wang*, C.-F. Wu, S.-H. Chen, and C.-H. Kao | Electronics Letters |
| 1999/9/1 | 期刊論文 | The study of an architecture of WWW software of multimedia computer assembly | C.-F. Tsai, and C.-C. Wang* | Bulletin of National Pingtung University of Science and Technology |
| 1999/7/1 | 期刊論文 | A low-power high-speed dynamic PLA circuit configuration for single-clock CMOS | C.-C. Wang*, C.-F. Wu, R.-T. Hwang, and C.-H. Kao | IEEE Trans. on Circuits and Systems, Part I : Fundamental Theory and Applications |
| 1999/1/1 | 期刊論文 | Dynamic NOR-NOR PLA Design with IDDQ Testability | C.-F. Wu, C.-C. Wang*, R.-T. Hwang, and C.-H. Kao | Inter. J. of Elctronics |
| 1998/11/1 | 期刊論文 | 1 GHz 64-bit high-speed comparator using ANT dynamic logic with two-phase clocking | C.-C. Wang*, C.-F. Wu, and K.-C. Tsai | IEE Proceedings - Computers and Digital Techniques |
| 1998/10/1 | 期刊論文 | The majority theorem of centralized multiple BAMs netwroks | C.-C. Wang*, and H.-S. Don | Information Sciences |
| 1998/7/1 | 期刊論文 | Analysis of radix searching of exponential bidirectional associative memory | C.-C. Wang*, C.-F. Tsai, and J.-P. Lee | IEE Proceedings - Computers and Digital Techniques |
| 1998/4/1 | 期刊論文 | Data compression by the recursive algorithm of exponential bidirectional associative memory | C.-C. Wang* and C.-R. Tsai | IEEE Trans. on System, Man, and Cybernetics, Part B: Cybernetics |
| 1997/3/1 | 期刊論文 | Digitial design of discrete exponential bidirectional associative memory | C.-C. Wang* and C.-L. Fan | Journal of VLSI Signal Processing |
| 1996/12/1 | 期刊論文 | Practical capacity analysis and radix searching algothims of asymptotically stable exponential bidirectional associative memory | C.-C. Wang | Journal of Information Science and Engineering |
| 1996/11/1 | 期刊論文 | Low-power greedy state pair grouping algorithm and power reduction estimation for finite state machine | C.-C. Wang* and Y.-L. Fan | The Proceedings of the Nationa Science Council, Part A: Physical Science and Engineering |
| 1996/10/1 | 期刊論文 | Capacity analysis of the asymptotically stable multi-valued exponential bidirectional associative memory | C.-C. Wang*, S.-M. Hwang, and J.-P. Lee | IEEE Trans. on Systems, Man, and Cybernetics Part B: Cybernetics |
| 1995/7/1 | 期刊論文 | The decision making properties of discrete multiple exponential bidirectional associative memories | C.-C. Wang* and J.-P. Lee | IEEE Trans. on Neural Networks |
| 1995/3/1 | 期刊論文 | An analysis of high-capacity discrete exponential BAM | C.-C. Wang* and H.-S. Don | IEEE Trans. on Neural Networks |
| 1995/1/1 | 期刊論文 | Belief combination by a potential model | H.-S. Don and C.-C. Wang* | Journal of Engineering |
| 1994/7/1 | 期刊論文 | A modified measure for fuzzy subsethood | C.-C. Wang* and H.-S. Don | Information Sciences |
| 1994--- | 期刊論文 | A polar model for evidential reasoning | C.-C. Wang* and H.-S. Don | Information Sciences |
| 1994--- | 期刊論文 | A robust continuous model for evidential reasoning | C.-C. Wang* and H.-S. Don | Journal of Intelligent & Robotic Systems |
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