會議論文- Chua-Chin Wang
| 出版年月 | 著作類別 | 著作名稱 | 作者 | 收錄出處 |
| 2024/8/1 | 研討會論文 | An on-chip temperature sensor with 1°C resolution and wide detection range using 180-nm CMOS process | S. Majumder, L. K. S. Tolentino, O. L. J. Al. Jose‡, V. N. Kolakaluri, M. M.-C. Chou, C.-C. Wang | |
| 2024/8/1 | 研討會論文 | Numerical investigation on microfluidic integrated side polished fiber to fetect biological analytes | M. Valliammai, J. Mohanraj, B. Esakki, L.-J. Yang, C.-C. Wang, R. Rishav | |
| 2024/7/1 | 研討會論文 | 54.61-GOPS 96.35-mW digital logic accelerator for underwater object recognition DNN using 40-nm CMOS process | C.-C. Wang, S.-H. Lou, H.-C. Wu, R. G. B. Sangalang, C.-P. Jou, H. Hsia, L.-C. Cho | |
| 2024/7/1 | 研討會論文 | A 266.7 TOPS/W computing-in memory using single-ended 6T 4-Kb SRAM in 16-nm FinFET CMOS process | C.-Y. Lo, L. K. S. Tolentino, J.-Y. Ker, J. S. Walling, Y. Yi, C.-C. Wang | |
| 2024/7/1 | 研討會論文 | GA-Optimized 6.0-Gbps DDR5 SDRAM I/O buffer design for 16-nm FinFET CMOS process | J.-Y. Ker, L. K. S. Tolentino, C.-Y. Lo, T.-J. Lee, C.-C. Wang | |
| 2024/5/1 | 研討會論文 | A 10-MHz 5-V on-chip 6-layer multi-level digital transformer using T18HVG2 process | O. L. J. A. Jose, Y.-C. Chang, V. N. Kolakaluri, C. B. Co, M. M.-C. Chou, C.-C. Wang | |
| 2024/5/1 | 研討會論文 | A highly reliable XNOR-XOR-RO PUF design for IoT security applications | J.-J. Chen, R. G. B. Sangalang, H.-C. Wu, C.-C. Wang | |
| 2024/5/1 | 研討會論文 | A wide range 2-to-2048 division ratio frequency divider using 40-nm CMOS process | S. Majumber, V. N. Kolakaluri, O. L. J. A. Jose, C.-C. Wang | |
| 2024/5/1 | 研討會論文 | An on-chip temperature sensor with 1°C resolution and wide detection range using 180-nm CMOS process | P. Vellanki, H.-C. Tseng, Y.-X. Chen, L S S P. K. Chodisetti, C.-C. Wang | |
| 2023/11/1 | 研討會論文 | 2-level Miller detection-based high side gate driver design for power MOSFETs | O. L. J. A. Jose, V. N. Kolakaluri, J.-M. Kuo, M. M.-C. Chou, C.-C. Wang | |
| 2023/11/1 | 研討會論文 | A 1-kb Sub-1 fJ/b per access CAM design using 40-nm CMOS process | R. G. B. Sangalang, W.-Z. Chen, C.-C. Wang | |
| 2023/11/1 | 研討會論文 | A 2.6-GHz I/O buffer for DDR4 & DDR5 SDRAMs in 16-nm FinFET CMOS process | J.-Y. Ke, L. K. S. Tolentino, C.-Y. Lo, T.-J. Lee, C.-C. Wang | |
| 2023/11/1 | 研討會論文 | A 4-kHz per °C high linearity on-chip temperature sensor implemented using 40-nm CMOS process | R. G. B. Sangalang, C.-L. Lee, Y.-W. Shen, C. B. Co, C.-C. Wang | |
| 2023/11/1 | 研討會論文 | Using machine learning techniques to determine DDR5 SDRAM I/O buffer’s slew rate at different PVT variations | L. K. S. Tolentino, J.-Y. Ke, C.-Y. Lo, C.-C. Wang | |
| 2023/10/1 | 研討會論文 | Passiveless digitally controlled oscillator with embedded PVT detector using 40-nm CMOS | R. G. B. Sangalang, Y.-W. Shen, S. Reddy, L. K. S. Tolentino, C.-C. Wang | |
| 2023/8/1 | 研討會論文 | A 99.6 % duty cycle high-resolution DPWM using reconfiguring decoder | V. N. Kolakaluri, O. L. J. A. Jose, C.-C. Wang | |
| 2023/7/1 | 研討會論文 | Three-level DC-DC Buck Converter Architecture Using Digital Pulse Width Modulation | J. Akiri, V. N. Kolakalurr, L.-J. Yang, B. Esakki, P. Suresh, C.-C. Wang | |
| 2023/5/1 | 研討會論文 | Matrix phase shift based DPWM technique to achieve 90% duty cycle | V. N. Kolakaluri, O. L. J. A. Jose, C.-C. Wang | |
| 2023- | 研討會論文 | SiC MOSFET high side gate driver design using HV CMOS process | O. L. J. A. Jose, R.-M. Kuo, V. N. Kolakaluri, C.-C. Wang | |
| 2022/12/1 | 研討會論文 | A 4-stage negative voltage charge pump with randomly selectable parallel switches | C.-C. Wang, H.-C. Wu, T.-H. Lin | |
| 2022/11/1 | 研討會論文 | A 500-MHz 32-bit DETFF-based shift register utilizing 40-nm CMOS technology | J. Akiri, L. K. S. Tolentino, L.-J. Yang, B. Esakki, S. Sampath, C.-C. Wang | |
| 2022/11/1 | 研討會論文 | A novel constant-pulse scheme for synchronous half-bridge converter module | O. L. J. A. Jose, V. N. Kolakaluri, C.-C. Wang | |
| 2022/11/1 | 研討會論文 | A power effective DLA for PBs in opto-electrical neural network architecture | R. G. B. Sangalang, S.-H. Luo, H.-C. Wu, B.-Q. He, S.-F. Hsiao, C.-C. Wang, C. Jou, H. Hsia, D. Yu | |
| 2022/10/1 | 研討會論文 | A low-energy 8-bit CLA realized by single-phase ANT logic | D. S. Kamarajugadda, O. L. J. A. Jose, L.-J. Yang, B. Esakki, S. Sampath, C.-C. Wang | |
| 2022/10/1 | 研討會論文 | Sub-0.2 pJ/Access Schmitt trigger based 1-kb 8T SRAM implemented using 40-nm CMOS process | S. Reddy, R. G. B. Sangalang, C.-C. Wang | |
| 2022/10/1 | 研討會論文 | Wide lock-in range CDR with modified DQFD and coarse-fine tuning technique | T.-J. Lee, B.-H. Liao, C.-C. Wang | |
| 2022/5/1 | 研討會論文 | A 40-nm CMOS wide input range and variable gain time-difference amplifier based on current source architecture | L. Lin, L. K. S. Tolentino, C.-C. Wang | |
| 2021/11/1 | 研討會論文 | A 2.5-GHz 2×VDD 16-nm FinFET digital output buffer with slew rate and duty cycle self-adjustment | T.-J. Lee, W.-J. Su, L. K. S. Tolentino, C.-C. Wang | |
| 2021/11/1 | 研討會論文 | A 20 GHz 8-bit all-N-transistor logic CLA using 16-nm FinFET technology | T.-J. Lee, W.-S. Yang, C.-C. Wang | |
| 2021/11/1 | 研討會論文 | A single-ended low power 16-nm FinFET 6T SRAM design with PDP reduction circuit | C.-C. Wang, R. G. B. Sangalang, I.-T. Tseng | |
| 2021/10/1 | 研討會論文 | Analysis of layout arrangement for CMOS oscillators to reduce overall variation on wafer | P.-Y. Lou, Y.-Y. Ho, C.-C. Wang | |
| 2021/10/1 | 研討會論文 | On-chip CMOS corner detector design for panel drivers | P.-Y. Lou, Y.-X. Chen, C.-C. Wang | |
| 2021/6/1 | 研討會論文 | An AI AUV enabling vision-based diver-following and obstacle avoidance with 3D-modeling dataset | Y.-C. Chou, H.-H. Chen, C.-C. Wang, H.-M. Chou, and C.-C. Wang | |
| 2021/5/1 | 研討會論文 | 67.5-fJ per access 1-Kb SRAM using 40-nm logic CMOS process | C.-C. Wang, and C.-P. Kuo | |
| 2021/5/1 | 研討會論文 | A 100 MHz 9.14-mW 8-bit shift register using double edge triggered flip-flop | U. K. N. Ekkurthi, V. Dasari, J. Akiri, and C.-C. Wang | |
| 2021/5/1 | 研討會論文 | SRAM-based computation in memory architecture to realize single command of add-multiply operation and multifunction | C.-C. Wang, C.-Y. Huang, and C.-Y. Yeh | |
| 2020/12/1 | 研討會論文 | 100 MHz random number generator Design using interleaved metastable NAND/NOR latches | C.-C. Wang, and S.-W. Lu | |
| 2020/12/1 | 研討會論文 | 3D-modeling dataset augmentation for underwater AUV real-time manipulations | C.-C. Wang, C.-Y. Huang, C.-H. Lin, C.-H. Yeh, G.-X. Liu, and Y.-C. Chou | |
| 2020/11/1 | 研討會論文 | High voltage CMOS bidirectional current sensor for battery Monitoring in portable devices | C.-C. Wang, P.-Y. Lou, Z.-Y. Hou, H.-C. Tsai, Y.-J. Chiu, and Y.-C. Lin | |
| 2020/9/1 | 研討會論文 | 20V HV energy harvesting circuit with ACC/CV mode and MPPT control for a 5 W solar panel | T.-J. Lee, P.-K. Su, and C.-C Wang | |
| 2020/9/1 | 研討會論文 | 4.15 W SIDO buck converter with low cross regulation using adaptive PCCM control | T.-J. Lee, C.-K. Wang, and C.-C. Wang | |
| 2020/9/1 | 研討會論文 | A PVDF-film energy harvesting circuit design using CMOS process | C.-C. Wang, P.-C. Chen, Y.-H. Hsueh, C.-T. Pan, C.-K. Yen, T.-J. Lee., and J. R. Hizon | |
| 2019/10/1 | 研討會論文 | 2.5 GHz data rate 2xVDD digital output buffer design realized by 16-nm FinFET CMOS | C.-C. Wang, and S.-W. Liu | |
| 2019/10/1 | 研討會論文 | Sampling Rate Enhancement for SAR-ADCs Using Adaptive Reset Approach for FOG Systems | C.-T. Chen, T.-Y. Tsai, Y.-J. Chiu, and C.-C. Wang | |
| 2019/6/1 | 研討會論文 | A PVT validation phase-lock loop with multi-band VCO applied in closed-loop FOGs | T.-Y. Tsai, T.-S. Wang, Y.-J. Chiu, and C.-C. Wang | |
| 2019/6/1 | 研討會論文 | A low frequency OTA design with temperature-insensitive variable transconductance using 180-nm CMOS technology | N. Sulistiyanto, C.-C. Wang, and. R. Rieger | |
| 2019/6/1 | 研討會論文 | Small RV-based deep-towed seafloor sampling systems | Y.-C. Chou, H.-H. Chen, C.-C. Wang, Y.-H. Lin, B.-S. Huang, C.-C. Wang | |
| 2019/6/1 | 研討會論文 | Ultra low power single-ended 6T SRAM using 40 nm CMOS technology | C.-C. Wang, and I.-T. Tseng | |
| 2019/5/1 | 研討會論文 | A 1.5A 88.6% Li-ion battery charger design using pulse swallow technique in light load | C.-C. Wang, and G.-X. Liu | |
| 2019/5/1 | 研討會論文 | High efficiency buck converter with wide load current range using dual-mode of PWM and PSM | T.-J. Lee. C.-H. Hsu, and C.-C. Wang | |
| 2019/4/1 | 研討會論文 | A robust time-to-digital converter design with high precision for underwater vehicle system clock synchronization and sensing | P.-Y. Lou, K.-Y. Chao, and C.-C. Wang | |
| 2019/2/1 | 研討會論文 | Accurate RR-interval detection with daubechies filtering and adaptive thresholding | M. Rif’an, R. Rieger, and C.-C. Wang | |
| 2019/2/1 | 研討會論文 | Multifunctional in-memory computation architecture using single-ended disturb-free 6T SRAM | T.-Y. Tsai, Y.-H. Chen, and C.-C. Wang | |
| 2019/1/1 | 研討會論文 | A broken line detection circuit for multi-cell Li-ion battery module | P.-Y. Lou, C.-H. Chu, and C.-C. Wang | |
| 2018/12/1 | 研討會論文 | Accurate RR-Interval acquisition with stationary wavelet transform and adaptive thresholding | M. Rif’an, R. Rieger, and C.-C. Wang | |
| 2018/10/1 | 研討會論文 | 40-nm 2xVDD digital output buffer design with DDR4-compliant slew rate | C.-C. Wang, Z.-Y. Hou, and S.-W. Huang | |
| 2018/10/1 | 研討會論文 | High SFDR pipeline ROM-less DDFS design on FPGA platform using parabolic equations | C.-C. Wang, and H.-Y. Shih | |
| 2018/10/1 | 研討會論文 | Switching activity analysis of shifters and multipliers for application to ROM-less DDFS architecture selection for low power performance | C.-C. Wang, and H.-Y. Shih | |
| 2018/6/1 | 研討會論文 | An on-chip PWM-based DC-DC buck converter design with high-efficiency light load mode operation | C.-C. Wang, and C.-J. Hsu | |
| 2018/6/1 | 研討會論文 | Impedance calculation read-out system for biomedical sensors | G.-R. Chen, T.-Y. Tsai, and C.-C. Wang | |
| 2018/6/1 | 研討會論文 | Low-power high-speed 8-bit shift register using double-edge triggered flip-flops | A. Baskoro, O. Setyawati, P. Siwindarto, and C.-C. Wang | |
| 2018/1/1 | 研討會論文 | A frequency-shift readout system with offset cancellation OPA for portable devices of marijuana detection | H.-C. Huang, D.-S. Wang, and C.-C. Wang | |
| 2017/11/1 | 研討會論文 | A pipeline ROM-less DDFS using equal-division interpolation | T.-Y. Tsai, H.-Y. Shih, and C.-C. Wang | |
| 2017/11/1 | 研討會論文 | Dynamic power estimation for ROM-less DDFS designs using switching Activity analysis | W. Wang, Y.-Y. Xu, and C.-C. Wang | |
| 2017/10/1 | 研討會論文 | 2×VDD 28-nm CMOS digital output buffer using low-Vth transistors for slew rate adjustment | C.-C. Wang, T.-Y. Tsai, Y.-L. Deng, T.-J. Lee | |
| 2017/8/1 | 研討會論文 | A temperature to frequency converter with linearity calibration | Z.-Y. Hou, J.-C. You, C.-C. Wang | |
| 2017/8/1 | 研討會論文 | Design of a multidisciplinary project-oriented capstone course for mechanical engineering education | C.-C. Cheng, C.-H. Lin, Y.-J. Wang, C.-C. Wang | |
| 2017/8/1 | 研討會論文 | High-voltage bidirectional current sensor | Z.-Y. Hou, H.-C. Tsai, and C.-C. Wang | |
| 2017/5/1 | 研討會論文 | primary-side output current estimator with process compensator for flyback LED drivers | Z.-Y. Hou, Z.-Y. Ho, J.-C. You, and C.-C. Wang | |
| 2017/1/1 | 研討會論文 | State of charge, state of health, and state of function monitoring for EV BMS | Z.-Y. Hou, P.-Y. Lou, C.-C. Wang | |
| 2016/10/1 | 研討會論文 | A novel frequency-shift readout system for CEA concentration detection application | D.-S. Wang, Y.-S. Liu, and C.-C. Wang | |
| 2016/10/1 | 研討會論文 | Disturb-free 5T loadless SRAM cell design with multi-Vth transistors using 28 nm CMOS process | C.-C. Wang, and C.-L. Hsieh | |
| 2016/6/1 | 研討會論文 | A Project-oriented Capstone Course for Creative Engineering Education | C.-C. Cheng, C.-C. Wang, Y.-J. Wang, Y.-Y. Cheng, C.-C. Wang | |
| 2016/6/1 | 研討會論文 | A method of leakage reduction and slew-rate adjustment in 2 x VDD output buffer For 28 nm CMOS technology and above | T.-Y. Tsai, Y.-Y. Chou, C.-C. Wang | |
| 2016/6/1 | 研討會論文 | On-chip accurate primary-side output current estimator for flyback LED driver control | Z.-Y. Hou, T.-W. Huang, C.-C. Wang | |
| 2016/5/1 | 研討會論文 | A nano-scale 2xVDD I/O buffer with encoded PV compensation technique | T.-Y. Tsai, Y.-L. Teng, and C.-C. Wang | |
| 2016/5/1 | 研討會論文 | An accurate phase shift detector using bulk voltage boosting technique for sensing applications | Y.-T. Tu, D.-S. Wang, and C.-C. Wang | |
| 2016/1/1 | 研討會論文 | A flyback driver with adaptive switching frequency control for smart lighting | C.-C. Wang, Z.-Y. Hou, T.-W. Huang | |
| 2015/11/1 | 研討會論文 | 10 Mbps high-voltage digital transciever on single die for 50 V voltage swing | C.-C. Wang, and M.-Y. Tseng | |
| 2015/11/1 | 研討會論文 | A capacity monitoring system with HV current sensor and calibrated current estimation approach | W.-J. Lu, S.-S. Wang, M.-Y. Tseng, and C.-C. Wang | |
| 2015/8/1 | 研討會論文 | A wide range and high conversion gain power detector for frequency shift sensing applications | C.-C. Wang, D.-S. Wang, S.-Y. Chen, C.-M. Chang | |
| 2015/6/1 | 研討會論文 | A high-speed 2 x VDD output buffer with PVTL detection using 40-nm CMOS technology | C.-C. Wang, T.-Y. Tsai, and W. Lin | |
| 2015/1/1 | 研討會論文 | A Wide Range Power Detector for Biosensing Systems Using Frequency Shift Schemes | C.-C. Wang, D.-S. Wang, S.-Y. Chen, and C.-M. Chang | |
| 2015/1/1 | 研討會論文 | A high-voltage transceiver for electrical vehicle battery management systems | C.-L. Chen, D.-S. Wang, J.-J. Li, and C.-C. Wang | |
| 2014/11/1 | 研討會論文 | A 20 GHz power detector with 176 mV/dB conversion gain | C.-C. Wang, D.-S. Wang, S.-Y. Chen, and C.-M. Chang | |
| 2014/11/1 | 研討會論文 | An all-digital battery capacity monitor using calibrated current estimation approach | C.-C. Wang, W.-J. Lu, and M.-Y. Tseng | |
| 2014/11/1 | 研討會論文 | Low power cross-domain high-voltage transmitters for battery management systems | C.-L. Chen, Y.-H. Su, and C.-C. Wang | |
| 2014/6/1 | 研討會論文 | A CMOS wide-range temperature sensor with process compensation and second-order calibration for battery management systems | C.-C. Wang, W.-J. Lu, and T.-C. Wu | |
| 2014/6/1 | 研討會論文 | A fast CEA analyzer prototype for point of care testing | C.-C. Wang, C.-H. Liao, C.-M. Chang, J.-W. Lan, and I.-Y. Huang | |
| 2014/6/1 | 研討會論文 | A single-ended disturb-free 5T loadless SRAM with leakage sensor and read delay compensation using 40 nm CMOS process | C.-C. Wang, C.-H. Liao, and S.-Y. Chen | |
| 2014/6/1 | 研討會論文 | Bus driver controller with hazard detection for FlexRay protocol 3.0.1 | C.-C. Wang, Z.-Y. Hou, and C.-L. Chen | |
| 2014/6/1 | 研討會論文 | Slew rate improved 2×VDD output buffer using leakage and delay compensation | T.-J. Lee, W. Lin, and C.-C. Wang | |
| 2014/5/1 | 研討會論文 | 32% slew rate and 27% data rate improved 2×VDD output buffer Using PVTL compensation | T.-J. Lee, K.-W. Ruan, C.-C. Wang | |
| 2014/5/1 | 研討會論文 | An on-chip high-voltage current sensor for battery module monitoring | C.-C. Wang, W.-J. Lu, S.-S. Wang | |
| 2013/11/1 | 研討會論文 | A 50-MHz clock generator with voltage and temperature compensation using low dropout regulator | C.-C. Wang, T.-C. Song, T.-Y. Yang, and Y.-J. Hsieh | |
| 2013/11/1 | 研討會論文 | A CEA concentration measurement system using FPW biosensors and frequency-shift readout IC | C.-C. Wang, T.-C. Song, C.-H. Liao, C.-M. Chang, J.-W. Lan, and I.-Y. Huang | |
| 2013/11/1 | 研討會論文 | A temperature detector with process compensation and non-linear calibration for battery management systems with HV ESD protection | C.-C. Wang, W.-J. Lu, T.-Y. Tsai, T.-C. Wu, and C.-Y. Juan | |
| 2013/5/1 | 研討會論文 | A 10-bit 400-MS/s current-steering DAC with process calibration | T.-J. Lee, C.-M. Chang, T.-C. Sung, and C.-C, Wang | |
| 2013/5/1 | 研討會論文 | A High-Speed 2×VDD Output Buffer With PVT Detection Using 40-nm CMOS Technology | C.-C. Wang, W.-J. Lu, and H.-Y. Tseng | |
| 2013/5/1 | 研討會論文 | High voltage operational amplifier and high voltage transceiver using 0.25 um 60V BCD process for battery management systems | C.-L. Chen, Y.-L. Wu, C.-Y. Juan, and C.-C. Wang | |
| 2013/1/1 | 研討會論文 | A delay-based transceiver with over-current protection for ECU nodes in automobile FlexRay systems | C.-C. Wang, C.-L. Chen, Z.-Y. Hou, and S.-C. Lin | |
| 2012/12/1 | 研討會論文 | A reconfigurable 16-channel HV stimulator ASIC for spinal cord stimulation systems | C.-C. Wang, T.-C. Sung, Y.-H. Wu, C.-H. Hsu, and D. Shmilovitz | |
| 2012/12/1 | 研討會論文 | Linear programmable gain amplifier using reconfiguration local-feedback transconductors | T.-J. Lee, W.-J. Lu, W.-C. Hsiao, and C.-C. Wang | |
| 2012/11/1 | 研討會論文 | A Battery Interconnect Module with High Voltage Transceiver Using 0.25 μm 60V BCD Process for Battery Management Systems | C.-L. Chen, D.-S. Wang, J.-J. Li, and C.-C. Wang | |
| 2012/5/1 | 研討會論文 | A digital over-temperature protector for FlexRay systems | C.-L. Chen, S.-C. Lin, and C.-C. Wang | |
| 2012/5/1 | 研討會論文 | A fast FPW-based protein concentration measurement system | C.-C. Wang, C.-H. Hsu, Y.-D. Tsai, Y.-C. Chen, M.-C. Lee, and I.-Y. Huang | |
| 2012/5/1 | 研討會論文 | A high voltage analog multiplexer with digital calibration for battery management systems | C.-L. Chen, Y. Hu, W. Luo, C.-C. Wang, and C.-Y. Juan | |
| 2012/5/1 | 研討會論文 | Feed-forward output swing prediction AGC with parallel-detect singular-store peak detector | S.-H. Yang, and C.-C. Wang | |
| 2012/5/1 | 研討會論文 | On-chip MOS PVT variation monitor for slew rate self-adjusting 2×VDD output buffers | C.-L. Chen, H.-Y. Tseng, R.-C. Kuo, and C.-C. Wang | |
| 2012/5/1 | 研討會論文 | Single-ended disturb-free 5T loadless SRAM cell using 90 nm CMOS process | S.-Y. Chen, and C.-C. Wang | |
| 2012/5/1 | 研討會論文 | Temperature and process compensated clock generator using feedback TPC Bias | T.-J. Lee, D. Shmilovitz, Y.-J. Hsieh, C.-C. Wang | |
| 2012/4/1 | 研討會論文 | A slew rate self-adjusting 2×VDD output buffer with PVT compensation | C.-L. Chen, H.-Y. Tseng, R.-C. Kuo, C.-C. Wang | |
| 2012/1/1 | 研討會論文 | A PLC transceiver design of in-vehicle power line in FlexRay-based automotive communication systems | G.-N. Sung, C.-M. Huang, and C.-C. Wang | |
| 2012/1/1 | 研討會論文 | A fast FPW allergy analyzer prototype for point of care (POC) | C.-H. Hsu, Y.-D. Tsai, Y.-C. Chen, M.-C. Lee, I.-Y. Huang, and C.-C. Wang | |
| 2012/1/1 | 研討會論文 | Configurable active star Design for automobile FlexRay systems | C.-C. Wang, C.-L. Chen, J.-J. Li, and C.-Y. Juan | |
| 2011/12/1 | 研討會論文 | 20 MHz accurate peak detector for FPW allergy biosensor with digital calibration | T.-J. Lee, W.-C. Hsiao, and C.-C. Wang | |
| 2011/12/1 | 研討會論文 | A fast-locking clock and data recovery circuit with a lock detector loop | C.-L. Chen, and C.-C. Wang | |
| 2011/12/1 | 研討會論文 | ROM-less DDFS using non-equal division parabolic polynomial interpolation method | C.-H. Hsu, Y.-C. Chen, and C.-C. Wang | |
| 2011/11/1 | 研討會論文 | A 48-dB dynamic gain range/stage linear-in-dB low power variable gain amplifier for direct-conversion receivers | S.-H. Wang, and C.-C. Wang | |
| 2011/9/1 | 研討會論文 | 2.45 GHz ZigBee receiver frontend for HAN with smart meter | T.-J. Lee, W. Lou, S.-H. Yang, M.-H. Shih, K.-C. Kuo, and C.-C. Wang | |
| 2011/8/1 | 研討會論文 | On-chip process and temperature compensation and self-adjusting slew rate control for output buffer | R.-C. Kuo, H.-Y. Tseng, J.-W. Liu, and C.-C. Wang | |
| 2011/5/1 | 研討會論文 | A frequency-shift readout system for FPW allergy biosensor | C.-H. Hsu, Y.-R. Lin, Y.-D. Tsai, Y.-C. Chen, and C.-C. Wang | |
| 2011/5/1 | 研討會論文 | A high speed transceiver front-end design with fault detection for FlexRay-based automotive communication systems | C.-C. Wang, C.-L. Chen, T.-H. Yeh, Y. Hu, and G.-N. Sung | |
| 2011/5/1 | 研討會論文 | A high voltage battery charger with smooth charge mode transition in BCD process | S.-H. Yang, J.-W. Liu, Y.-H. Wu, D.-S. Wang, and C.-C. Wang | |
| 2011/5/1 | 研討會論文 | Domestic indirect feedback compensation of multiple-stage amplifiers for multiple-voltage level-converting amplification | S.-H. Yang, and C.-C. Wang | |
| 2011/5/1 | 研討會論文 | One-time Implantable SCS System | C.-H. Hsu, S.-B. Tseng, Y.-J. Hsieh, and C.-C. Wang | |
| 2011/1/1 | 研討會論文 | A low power wake up detector for ECU nodes in an automobile FlexRay system | C.-C. Wang, C.-L. Lin, J.-J. Li, and G.-N. Sung | |
| 2011/1/1 | 研討會論文 | Low power RC5 cipher for ZigBee portable biomedical systems | Y.-R Lin, C.-H. Hsu, R. Rieger, and C.-C. Wang | |
| 2010/12/1 | 研討會論文 | A PCI166-compatible 3xVDD-tolerant mixed-voltage I/O buffer | R.-C. Kuo, H.-H. Hou, and C.-C. Wang | |
| 2010/12/1 | 研討會論文 | A high precision low dropout regulator with nested feedback loops | R.-C. Kuo, T.-H. Tsai, Y.-J. Hsieh, and C.-C. Wang | |
| 2010/11/1 | 研討會論文 | On the capacitively coupled transmission channel for body area network application | C.-Y. Li, C.-C. Wang, and R. Rieger | |
| 2010/6/1 | 研討會論文 | 450 MHz 1.0 V to 1.8 V bidirectional mixed-voltage I/O buffer using 90-nm process | C.-C. Wang, R.-C. Kuo, and J.-W. Liu | |
| 2010/6/1 | 研討會論文 | A high-efficiency DC-DC buck converter for sub-3xVDD power supply | G.-N. Sung, C.-L. Wang, P.-C. Jui, and C.-C. Wang | |
| 2010/5/1 | 研討會論文 | A 125-MHz wide-Range mixed-voltage I/O buffer using gated floating N-well circuit | C.-C. Wang, S.-C. Liao, and Y.-C. Liu | |
| 2010/5/1 | 研討會論文 | A mini-invasive multi-function biomedical pressure measurement system ASIC | C.-C. Wang, C.-C. Huang, Y.-C. Liu, V. Pikov, and D. Shmilovitz | |
| 2010/4/1 | 研討會論文 | A one-time implantable wireless power bidirectional transmission spinal cord stimulation system | C.-C. Wang, C.-H. Hsu, S.-B. Tseng, and D. Shmilovitz, “A one-time implantable wireless power bidirectional transmission spinal cord stimulation system | |
| 2010/1/1 | 研討會論文 | A power-aware signed 2-dimensional bypassing multiplier for video/image processing | G.-N. Sung, Y.-C. Lu, and C.-C. Wang | |
| 2010/1/1 | 研討會論文 | Personal gateway design for portable medical devices used in body area networks | C.-C. Wang, C.-Y. Yang, and C.-C. Huang | |
| 2009/12/1 | 研討會論文 | A 1.8 V to 3.3 V level-converting flip-flop design for multiple power supply systems | C.-C. Wang, J.-W. Liu, R.-C. Kuo, K. S.-M. Li, and S.-J. Wang | |
| 2009/11/1 | 研討會論文 | A high performance current-balancing instrumentation amplifier for ECG monitoring systems | C.-H. Hsu, C.-C. Huang, K.-S. Lim, W.-C. Hsiao, and C.-C. Wang | |
| 2009/8/1 | 研討會論文 | A 1/2 x VDD to 3 x VDD bidirectional I/O buffer using 0.18-um 1.8-V CMOS technology | C.-C. Wang, C.-H. Hsu, and Y.-C. Liu | |
| 2009/5/1 | 研討會論文 | A 0.9 V to 5 V mixed-voltage I/O buffer using NMOS clamping technique | C.-C. Wang, J.-W. Liu, and R.-C. Kuo | |
| 2009/5/1 | 研討會論文 | A drive circuit for piezoelectric devices with low harmonics content | S. Ozeri, D. Shmilovitz, and C.-C. Wang | |
| 2009/5/1 | 研討會論文 | Low-power 7.2 GHz complementary all-N-transistor logic using 90 nm CMOS technology | C.-H. Hsu, G.-N. Sung, T.-Y. Yao, C.-Y. Juan, Y.-R. Lin, and C.-C. Wang | |
| 2009/1/1 | 研討會論文 | Physical layer design for ECU nodes in FlexRay-based automotive communication systems | C.-C. Wang, G.-N. Sung, C.-L. Wang, P.-C. Chen, M.-F. Luo, and H.-C. Hu | |
| 2008/11/1 | 研討會論文 | A Li-ion battery charging design for biomedical implants | C.-C. Huang, S.-F Yen, and C.-C. Wang | |
| 2008/11/1 | 研討會論文 | A ROM-less DDFS using a nonlinear DAC with an error compensation current array | C.-C. Wang, C.-.H. Hsu, T.-Y. Yao, and J.-M. Huang | |
| 2008/11/1 | 研討會論文 | R-less and C-less self-sampled ASK demodulator for lower ISM band applications | C.-C. Huang, C.-L. Chen, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | 0.9 V to 5.0 V mixed-voltage I/O buffer design using 0.18 um 1.8-V CMOS technology | T.-J. Lee, R.-W. Liu, T.-H. Tsai, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | A 32-Bit carry lookahead adder design using complementary all-N-transistor logic | G.-N. Sung, C.-Y. Juan, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | A ROM-less direct digital frequency synthesizer based on 16-Segment parabolic polynomial interpolation | J.-M. Huang, C.-C. Lee, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | A self-disable sense technique with differential NAND cell for content-addressable memories | C.-C. Huang, J.-H. Wu, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | All digital frequency synthesizer using a flying adder | J.-M. Huang, Y.-C. Lu, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | Mixed-voltage I/O buffer design using 0.35 um CMOS technology | T.-J. Lee, W.-C. Chang, and C.-C. Wang | |
| 2008/8/1 | 研討會論文 | The bus guardian design of FlexRay automotive communication systems | G.-N. Sung, C.-L. Wang, and C.-C. Wang | |
| 2008/5/1 | 研討會論文 | A mini-invasive multi-function bladder urine pressure measurement system | C.-C. Wang, C.-C. Huang, J.-H. Wu, I.-Y. Huang, C.-P. Li, Y.-C. Lee, and W.-J. Wu | |
| 2008/5/1 | 研討會論文 | A power-aware 2-dimensional bypassing multiplier using cell-based design flow | G.-N. Sung, Y.-J. Ciou, and C.-C. Wang | |
| 2008/5/1 | 研討會論文 | Power-saving nano-scale DRAMs with an adaptive refreshing clock generator | T.-H. Tsai, C.-L. Chen, C.-L. Lee, and C.-C. Wang | |
| 2008/4/1 | 研討會論文 | 1.8 V to 5.0 V mixed-voltage-tolerant I/O buffer with 54.59% output duty cycle | T.-J. Lee, Y.-C. Liu, and C.-C. Wang | |
| 2008/4/1 | 研討會論文 | Bus guardian design of automobile networking ECU nodes compliant with FlexRay standards | G.-N. Sung, C.-Y. Juan, and C.-C. Wang | |
| 2008/1/1 | 研討會論文 | A system prototype for portable wireless medical devices | C.-C. Wang and C.-C. Huang | |
| 2008/1/1 | 研討會論文 | A transceiver design for ECU nodes in FlexRay-based automotive communication systems | C.-C. Wang, G.-N. Sung, and P.-C. Chen | |
| 2007/10/1 | 研討會論文 | Mixed-voltage-tolerant I/O buffer using a clamping dynamic gate bias generator | T.-J. Lee, W.-C. Chang, and C.-C. Wang | |
| 2007/9/1 | 研討會論文 | A direct digital frequency synthesizer with CMOS OTP ROM | C.-C. Huang, G.-L. Jhuang, and C.-C. Wang | |
| 2007/9/1 | 研討會論文 | A low power DDFS design with error compensation using a nonlinear digital-to-analog converter | J.-M. Huang, C.-L. Lee, J.-T. Chen, and C.-C. Wang | |
| 2007/9/1 | 研討會論文 | C-less and R-less low-frequency ASK demodulator for wireless implantable devices | T.-J. Lee, C.-L. Lee, Y.-J. Ciou, C.-C. Huang, and C.-C. Wang | |
| 2007/9/1 | 研討會論文 | Mixed-voltage-tolerant I/O buffer design | T.-J. Lee, T.-Y. Chang, and C.-C. Wang | |
| 2007/5/1 | 研討會論文 | A low-power sensorless inverter controller of brushless DC motors | C.-C. Wang, G.-N. Sung, K.-W. Fang, and S.-L. Tseng | |
| 2007/5/1 | 研討會論文 | An implantable long-term bladder urine pressure measurement system with a 1-atm canceling instrumentation amplifier | C.-C. Wang, C.-C. Huang, J.-S. Liou, Y.-J. Ciou, I.-Y. Huang, C.-P. Li, Y.-C. Lee, and W.-J. Wu | |
| 2007/1/1 | 研討會論文 | A low-power 2.45 GHz ZigBee transceiver for wearable personal medical devices in WPAN | C.-C. Wang, J.-M. Huang, L.-H. Lee, S.-H. Wang, and C.-P. Li | |
| 2007/1/1 | 研討會論文 | DVB-T receiver with a fully digital I/Q separator | C.-C. Wang, M.-K. Chang, and T.-W. Cheng | |
| 2007/1/1 | 研討會論文 | Handheld DVB-T digital TV with an automatic antenna selection method for mobile reception | C.-C. Wang, G.-N. Sung, J.-Y. Liao, J. Chang, and R. Hu | |
| 2006/12/1 | 研討會論文 | A 140-dB CMRR low-noise instrumentation amplifier for neural signal sensing | C.-C. Wang, C.-C. Huang, J.-S. Liou, and K.-W. Fang | |
| 2006/12/1 | 研討會論文 | A linear LDO regulator with modified NMCF frequency compensation independent of off-chip capacitor and ESR | C.-C. Wang, C.-C. Huang, T.-J. Lee, and U. F. Chio | |
| 2006/12/1 | 研討會論文 | A low-power 4-T SAM design for OFDM demodulators in DVB receivers | C.-C. Wang, G.-N. Sung, M.-K. Chang, C.-L. Lee, C.-M. Wu, and J.-Y. Chen | |
| 2006/12/1 | 研討會論文 | An all-MOS high linearity voltage-to-frequency converter chip with 520 KHz/V sensitivity | C.-C. Wang, T.-J. Lee, C.-C. Li, and R. Hu | |
| 2006/12/1 | 研討會論文 | An implantable SOC chip for micro-stimulating and neural signal recording | C.-C. Wang, C.-C. Huang, T.-J. Lee, C.-M. Wu, G.-N. Sung, K.-W. Fang, S.-L. Tseng, and J.-J. Chen | |
| 2006/12/1 | 研討會論文 | Codec design for variable-length to fixed-length data conversion for H.263 | C.-C. Wang, G.-N. Sung, and J.-H. Lin | |
| 2006/12/1 | 研討會論文 | Energy-efficient double-edge triggered flip-flop design | C.-C. Wang, G.-N. Sung, M.-K. Chang, and Y.-Y. Shen | |
| 2006/12/1 | 研討會論文 | Ultra-low power implantable neural signal interface | C.-C. Wang, J.-J. J. Chen, C.-C. Huang, T.-J. Lee, C.-M. Wu, K.-W. Fang, G.-N. Sung, S.-L. Tseng, G.-L. Jhuang, J.-S. Liou, J.-H. Lin, Y.-J. Ciou | |
| 2006/11/1 | 研討會論文 | 10-bit 30-MSample/s low power pipeline ADC for DVB-H receiver systems | C.-C. Wang, J.-M. Huang, and T.-Y. Zhang | |
| 2006/11/1 | 研討會論文 | Cost-effective residue amplifier design for sensorless BLDC motor control | C.-C. Wang, G.-N. Sung, and J.-Y. Liao | |
| 2006/5/1 | 研討會論文 | A 4-Kb low power 4-T SRAM design with negative word-line gate drive | C.-C. Wang, C.-L. Lee, and W.-J. Lin | |
| 2006/5/1 | 研討會論文 | A 6.57 mW ZigBee transceiver for 868/915 MHz band | C.-C. Wang, J.-M. Huang, C.-Y. Chang, K.-T. Cheng, and C.-P. Li | |
| 2006/4/1 | 研討會論文 | A 0.18 µm CMOS prototype of COFDM demodulator for European DVB-T standard | C.-C. Wang, J.-M. Huang, Y.-M. Tseng, and C.-Y. Chang | |
| 2006/3/1 | 研討會論文 | A low-power 2-dimensional bypassing multiplier using 0.35 um CMOS technology | C.-C. Wang and G.-N. Sung | |
| 2006/1/1 | 研討會論文 | 868/915 MHz ZigBee receiver for personal medical assistance | C.-C. Wang, J.-M. Huang, C.-Y. Chang, and C.-P. Li | |
| 2006/1/1 | 研討會論文 | High-sensitivity and high-mobility compact DVB-T receiver for in-car entertainment | C.-C. Wang, H. K. Lo, S.-P. Lin, and R. Hu | |
| 2005/11/1 | 研討會論文 | 10-bit 80 Msps ADC using closed-loop MDACs for DVB-T receivers | C.-C. Wang, Y.-L. Tseng, S.-F. Hong, and K.-T. Cheng | |
| 2005/11/1 | 研討會論文 | A 19-T full adder with high impedance circuits and conflict circuits for mobile devices’ controllers | C.-C. Wang, Y.-L. Tseng, and Y.-S. Chang | |
| 2005/11/1 | 研討會論文 | A 9-bit 20-MSample/s pipeline ADC for NTSC video decoders | C.-C. Wang, J.-M. Huang, and T.-K. Cheng | |
| 2005/11/1 | 研討會論文 | A low-power all-digital phase-locked loop using binary frequency searching | C.-C. Wang, T.-J. Lee, and S.-L. Tseng | |
| 2005/11/1 | 研討會論文 | A power-aware 8×8 multiplier using 2-dimensional bypassing method | C.-C. Wang and G.-N. Sung | |
| 2005/11/1 | 研討會論文 | Low power CMOS output cell design with spike filtering for baseband digital signal processing | C.-C. Wang, C.-L. Lee, and Y.-S. Chang | |
| 2005/11/1 | 研討會論文 | Low-power 5-bit 2.4 MS/s successive approximation ADC for ZigBee receiver using 868/915 MHz band | C.-C. Wang, J.-M. Huang, and K.-T. Cheng | |
| 2005/8/1 | 研討會論文 | A CMOS IF-band mixed-signal converter design for DVB-T receivers | C.-C. Wang, C.-L. Lee, and C.-C. Hung | |
| 2005/8/1 | 研討會論文 | A low power high-speed 8-bit pipelining CLA Design using dual threshold voltage domino logic | C.-C. Wang, C.-L. Lee, and T.-W. Cheng | |
| 2005/8/1 | 研討會論文 | Dual-OPA coil driver for heat dissipation of SOC’s | C.-C. Wang, T.-J. Lee, and K.-W. Fang | |
| 2005/8/1 | 研討會論文 | Low-power bus driver design based on a charge recycle technique | C.-C. Wang, J.-M. Huang, and Y.-M. Tseng | |
| 2005/5/1 | 研討會論文 | Wideband 70dB CMOS digital variable gain amplifier design for DVB-T receiver’s AGC | C.-C. Wang, C.-L. Lee, L.-P. Lin, and Y.-L. Tseng | |
| 2005/4/1 | 研討會論文 | A 38-dB stopband attenuation and 120-dB CMRR small-area LNA for neural signal sensing and recording | C.-C. Wang and C.-C. Huang | |
| 2005/4/1 | 研討會論文 | A Gm-C anti-aliasing filter design with digitally tunable bandwidth for DVB-T receivers | C.-C. Wang, C.-L. Lee, and C.-C. Hung | |
| 2005/4/1 | 研討會論文 | A low-jitter 80 MHz PLL for DVB-T receivers | C.-C. Wang, J.-M. Huang, and L.-P. Lin | |
| 2005/4/1 | 研討會論文 | An 80 MHz PLL chip with supply noise rejection using separate regulators | C.-C. Wang and T.-J. Lee | |
| 2005/1/1 | 研討會論文 | A 2K/8K mode small-area FFT processor for OFDM demodulation of DVB-T receivers | C.-C. Wang, J.-M. Huang, and H.-C. Cheng | |
| 2005/1/1 | 研討會論文 | Low-cost video decoder with 2D2L comb filter for NTSC digital TVs | C.-C. Wang, C.-L. Lee, and M.-K. Chang | |
| 2004/12/1 | 研討會論文 | Clock recovery and data recovery design for LVDS transceiver used in LCD panels | C.-C. Wang, C.-L. Lee, C.-Y. Hsiao, and J.-F. Huang | |
| 2004/12/1 | 研討會論文 | High-PSR NTSC Video Sync Separator | C.-C. Wang, T.-J. Lee, C.-C. Hung, and R. Hu | |
| 2004/12/1 | 研討會論文 | Power-Aware Design of An 8-Bit Pipelining Asynchronous ANT-based CLA Using Data Transition Detection | C.-C. Wang, C.-L. Lee, and P.-L. Liu | |
| 2004/8/1 | 研討會論文 | 1.0 Gbps LVDS transceiver design for LCD panels | C.-C. Wang, J.-M. Huang, and J.-F. Huang | |
| 2004/8/1 | 研討會論文 | 1.0 Gbps LVDS transceiver design using a common mode DC biasing | C.-C. Wang and J.-M. Huang | |
| 2004/8/1 | 研討會論文 | A 2K/8K Dual-Mode FFT Processor for OFDM of DVB-T Receivers | C.-C. Wang, J.-M. Huang, and H.-C. Cheng | |
| 2004/8/1 | 研討會論文 | An Implantable Neural Interface Micro-stimulator Chip with External Controllability | C.-C. Wang, Y.-H. Hsueh, Y.-T. Hsiao, U Fat Chio, C.-C. Huang, and P.-L. Liu | |
| 2004/6/1 | 研討會論文 | Clock recovery and data recovery design for LVDS transceiver used in LCD panels | C.-C. Wang, C.-L. Lee, C.-Y. Hsiao, and J.-F. Huang | |
| 2004/6/1 | 研討會論文 | Power-aware pipelining design of an 8-bit CLA using PLA-styled all-N-transistor logic | C.-C. Wang, C.-L. Lee, and P.-L. Liu | |
| 2004/5/1 | 研討會論文 | A C-less ASK demodulator for implantable neural interfacing chips | C.-C. Wang, Y.-H. Hseuh, U. F. Chio, and Y.-T. Hsiao | |
| 2004/5/1 | 研討會論文 | A phase-adjustable negative phase shifter using a single-shot locking method | C.-C. Wang, Y.-H. Hseuh, S.-F. Hong, and R.-S. Kao | |
| 2004/5/1 | 研討會論文 | High-PSR bias circuitry for NTSC sync separation | C.-C. Wang, Y.-L. Tseng, T.-J. Lee, and R. Hu | |
| 2003/12/1 | 研討會論文 | A boosted wordline voltage generator for low-voltage memories | C.-C. Wang, Y.-H. Hsueh, T.-W. Kuo, and R. Hu | |
| 2003/12/1 | 研討會論文 | Baseband design of a wireless transceiver for implantable neural interface | C.-C. Wang, Y.-H. Hsueh, Y.-T. Hsiao, and U. F. Chio | |
| 2003/12/1 | 研討會論文 | Codec design for variable-length to fixed-length data compression by using mutli-symbol encoding | C.-C. Wang, Y.-L. Tseng, and C.-C. Chen | |
| 2003/12/1 | 研討會論文 | Dual-polarity high voltage generator design for non-volatile memories | C.-C. Wang, Y.-L. Tseng, T.-H. Chen, and R. Hu | |
| 2003/11/1 | 研討會論文 | Low-cost NTSC digital video decoder using 4θ-based DDFS | C.-C. Wang, Y.-L. Tseng, C.-C. Chen, and C.-S. Chen | |
| 2003/11/1 | 研討會論文 | Low-variation 1.0 MHz clock generator with temperature compensation bias | C.-C. Wang, Y.-L. Tseng, T.-J. Lee, and R. Hu | |
| 2003/8/1 | 研討會論文 | 38.9 µW/MHz small-area digital I/O cell | C.-C. Wang, Y.-L. Tseng, C.-S. Chen, and R. Hu | |
| 2003/8/1 | 研討會論文 | 58 MHz/V sensitivity CMOS voltage-to-frequency converter using a current-mode voltage window comparator | C.-C. Wang, Y.-L. Tseng, C.-C. Li, and R. Hu | |
| 2003/8/1 | 研討會論文 | A 1.26ns access time current-mode sense amplifier design for SRAMs | C.-C. Wang, Y.-L. Tseng, C.-C. Li, and R. Hu | |
| 2003/8/1 | 研討會論文 | A phase-adjustable ROM-less direct digital frequency synthesizer with 41.66 MHz output frequency | C.-C. Wang, Y.-L. Tseng, W.-J. Lin, and R. Hu | |
| 2003/2/1 | 研討會論文 | A 4-Kb 667-MHz CMOS SRAM using dynamic threshold voltage wordline transistors | C.-C. Wang, T.-H. Chen, and R. Hu | |
| 2003/2/1 | 研討會論文 | Switched-Current 3-bit CMOS Wideband Random Signal Generator | C.-C. Wang, Y.-L. Tseng, H.-C. Cheng, and R. Hu | |
| 2002/9/1 | 研討會論文 | 6-T SRAM using dual threshold voltage transistors and low-power quenchers | C.-C. Wang, P.-M. Lee, and K.-L. Chen | |
| 2002/9/1 | 研討會論文 | A 1.2 GHz programmable DLL-based frequency multiplier for wireless applications | C.-C. Wang, H.-C. She, and R. Hu | |
| 2002/9/1 | 研討會論文 | A ROM-less direct digital frequency synthesizer by using trigonometric quadruple angle formula | C.-C. Wang, H.-C. She, and R. Hu | |
| 2002/8/1 | 研討會論文 | A 4-Kb 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches | C.-C. Wang, H.-Y. Leo, and R. Hu | |
| 2002/8/1 | 研討會論文 | A power-efficient clamping circuit for charge pumps used in low voltage memories | C.-C. Wang and H.-C. Cheng | |
| 2002/6/1 | 研討會論文 | A low-cost plasma display panel data dispatcher for image enhancement | C.-C. Wang, Y.-H. Hseuh, C.-S. Chen, and J.-F. Huang | |
| 2002/5/1 | 研討會論文 | A 6.4 Gbps FIFO Design for 8-32 two-way Data Exchange Bus | C.-C. Wang, Y.-H. Hsueh, and Y.-W. Chen | |
| 2002/5/1 | 研討會論文 | A fast inner product processor implementation for multi-valued exponential bidirectional associative memories | C.-C. Wang, Y.-L. Tseng, Y.-P. Chen, and C.-J. Huang | |
| 2001/12/1 | 研討會論文 | An FIFO memory design for 8-to-32 data exchange bus | C.-C. Wang and Y.-W. Chen | |
| 2001/12/1 | 研討會論文 | Robust reference clock generator design for DDR synchronous devices | C.-C. Wang, Y.-L. Tseng, and C.-W. Chen | |
| 2001/10/1 | 研討會論文 | 4x8 keypad scanner with RC5 protocol for wireless handsets | C.-C. Wang, P.-M. Lee, and Y.-A. Huang | |
| 2001/9/1 | 研討會論文 | A 1.0 GHz clock generator design with a negative delay using a single-shot locking method | C.-C. Wang, Y.-L. Tseng, and R.-S. Kao | |
| 2001/9/1 | 研討會論文 | A cost-effective 8051-based Chinese voice dialer for DECT handsets | C.-C. Wang, Y.-H. Hsueh, C.-W. Chen, J.-J. Wang, and R. Hu | |
| 2001/9/1 | 研討會論文 | A realized SONY PS2 1-to-4 joystick multiplexer interface | C.-C. Wang, R.-S. Kao, P.-M. Lee, and Y.-L. Huang | |
| 2001/9/1 | 研討會論文 | An area-saving 3-dimensional decoder structure for ROMs | C.-C. Wang, Y.-H. Hsueh, and Y.-P. Chen | |
| 2001/9/1 | 研討會論文 | Design of a cycle-efficient 64b/32b integer divider using a table-sharing method | C.-C. Wang, P.-M. Lee, J.-J. Wang, and C.-J. Huang | |
| 2001/9/1 | 研討會論文 | Fast half-swing inter-plane circuits for clocked NOR-NOR PLAs | C.-C. Wang, C.-C. Chiu, and Y.-T. Chien | |
| 2001/9/1 | 研討會論文 | VLSI circuit design of 16-Mbps IrDA VFIR transceivers | C.-C. Wang, C.-W. Chen, and Y.-L. Huang | |
| 2001/8/1 | 研討會論文 | A 4Kb DRAM using temperature-insensitive self-recharging circuitry | C.-C. Wang and C.-C. Chiu | |
| 2001/8/1 | 研討會論文 | Address transition detector with high noise immunity | C.-C. Wang and J.-J. Wang | |
| 2001/5/1 | 研討會論文 | A 1.25 GHz 32-bit tree-structured carry lookahead adder | C.-C. Wang, P.-M. Lee, R.-C. Lee, and C.-T. Huang | |
| 2000/12/1 | 研討會論文 | 100 Mbps ethernet network interface control IC | C.-C. Wang, R.-S. Kao, and Y.-L. Huang | |
| 2000/12/1 | 研討會論文 | A 1.25 GHz 8-bit tree-structured carry lookahead adder | C.-C. Wang, P.-M. Lee, C.-J. Huang, and R.-C. Lee, | |
| 2000/10/1 | 研討會論文 | A low-power and area-saving 8-bit analog-to-digital converter using a binary searching method | C.-C. Wang, Y.-H. Hsueh, and S.-K. Huang | |
| 2000/8/1 | 研討會論文 | FPGA-based system prototyping for smart battery management of mobile handsets | C.-C. Wang, Y.-H. Hsueh, Y.-L. Tseng, and S.-K. Huang | |
| 2000/7/1 | 研討會論文 | A novel neural architecture with high storage capacity | C.-C Wang and C.-F. Tsai | |
| 2000/6/1 | 研討會論文 | A fast tagged sorter used in 100/10 Mbps routers | C.-C. Wang, H.-L. Wu, and S.-K. Huang | |
| 2000/5/1 | 研討會論文 | A fast dynamic 64-bit comparator with small transistor count | C.-C. Wang, H.-L. Wu, and C.-F. Wu | |
| 2000/5/1 | 研討會論文 | Design of an inter-plane circuit for clocked PLAs | C.-C. Wang, Y.-T. Chien, and Y.-P. Chen | |
| 2000/5/1 | 研討會論文 | Improved Design of C2PL 3-2 compressors with less transistor count | C.-C. Wang, P.-M. Lee, and C.-J. Huang | |
| 1999/12/1 | 研討會論文 | A distributed neural-net training strategy for recognition of Chinese numbers used in the voice dialer of mobile handsets | C.-C. Wang, H.-L. Wu, and S.-K. Huang | |
| 1999/12/1 | 研討會論文 | A neural network processing model for address learning and recognition | C.-C. Wang and C.-F. Tsai | |
| 1999/12/1 | 研討會論文 | The industrial application of optical character recognition using PBHAN | C.-C. Wang and C.-F. Tsai | |
| 1999/12/1 | 研討會論文 | Universal current integration module IC design for smart battery management of mobile handsets | C.-C. Wang, Y.-H. Hsueh, Y.-L. Tseng, S.-K. Huang, and S.-F. Hsiao | |
| 1999/11/1 | 研討會論文 | A design of a bipolar-valued inner product processor for speech processing | C.-C. Wang, C.-J. Huang, and Y.-H. Hsueh | |
| 1999/11/1 | 研討會論文 | Hardware realization of a bit-serial 16-bit multiplier using low-power high-speed FPGA logic module for DSP applications | C.-C. Wang, C.-J. Huang, H.-L. Wu, and H.-M. Yang | |
| 1999/9/1 | 研討會論文 | A real chip used in low-cost testing modules for liquid crystal display drivers | C.-C. Wang, C.-F. Wu, S.-H. Chen, and C.-H. Kao | |
| 1999/9/1 | 研討會論文 | Design and verification of four non-homogeneous ALUs for 8-issue 64-Bit x86-compatible superscaler microprocessors | C.-C. Wang, S.-H. Chen, S.-F. Hsaio, and C.-L. Wu | |
| 1999/6/1 | 研討會論文 | A chip design of radix-4/2 64b/32b signed and usigned integer divider using COMPASS cell library | C.-C. Wang, C.-J. Huang, G.-C. Lin, and C.-F. Wu | |
| 1999/6/1 | 研討會論文 | A comparison of two alternative architectures of digital ratioed compressor design for inner product processing | C.-C. Wang, C.-J. Huang, and P.-M. Lee | |
| 1999/6/1 | 研討會論文 | A practical load-optimized VCO design for low-jitter 5V 500 MHz digital phase-locked loop | C.-C. Wang, Y.-T. Chien, and Y.-P. Chen | |
| 1999/6/1 | 研討會論文 | Theoretical expectation value of the capacity of fuzzy polynomial bidirectional hetero-correlator | C.-C. Wang and C.-F. Tsai | |
| 1999/5/1 | 研討會論文 | Cell-based implementation of a mixed-radix-8/4/2 64b/32b signed integer divider using COMPASS cell library | C.-C. Wang, I.-Y. Chang, and C.-F. Wu | |
| 1999/5/1 | 研討會論文 | Power-saving fast half-swing inter-plane circuit for clocked PLAs | C.-C. Wang, Y.-T. Chien, and Y.-P. Chen | |
| 1999/3/1 | 研討會論文 | Computer assisted learning system - the architecture of WWW software for multimedia computer assembly | C.-F. Tsai and C.-C. Wang | |
| 1999/3/1 | 研討會論文 | Construction of a secure of web database using active server pages technology | C.-F. Tsai and C.-C. Wang | |
| 1998/12/1 | 研討會論文 | A study for carru propagation delay of digital ratioed compressors | C.-C. Wang, C.-J. Huang, and P.-M. Lee | |
| 1998/12/1 | 研討會論文 | An image processing appraoch for wafer scratch identification | C.-C. Wang, C.-J. Huang, and S.-H. Chen | |
| 1998/10/1 | 研討會論文 | Fuzzy data recall using polynomial bidirectional hetero-correlator | C.-C. Wang and C.-F. Tsai | |
| 1998/8/1 | 研討會論文 | A quadrature decoder/counter interface IC for AC inductor motor server control | C.-C. Wang and Y.-L. Tseng | |
| 1998/6/1 | 研討會論文 | Design of single-ended SRAM with high test coverage and short test time | C.-F. Wu, C.-C. Wang, R.-T. Hwang, and C.-H. Kao | |
| 1998/6/1 | 研討會論文 | VLSI design of A 1.0 GHz 0.6-µm 8-Bit CLA using PLA-styled all-N-transistor Logic | C.-C. Wang and K.-C. Tsai | |
| 1998/4/1 | 研討會論文 | Design of fast dynamic CMOS comparators with fewer transistor count | C.-F. Wu, C.-C. Wang, Y.-L. Tseng, and C.-H. Kao | |
| 1997/12/1 | 研討會論文 | A low-power and high-speed dynmaic PLA circuit configurationfor single-clock CMOS | C.-C. Wang, C.-F. Wu, R.-T. Hwang, and C.-H. Kao | |
| 1997/12/1 | 研討會論文 | VLSI implemnetation of a word-slice pipelined maximum selector for priority queues | C.-C. Wang and G.-C. Lin | |
| 1997/9/1 | 研討會論文 | IDDQ testable configuration for PLAs by transformation into inverters | C.-F. Wu, C.-C. Wang, R.-T. Hwang, and C.-H. Kao | |
| 1997/8/1 | 研討會論文 | A 1.0 GHz 64-bit parallel comparator using two-phase clocking ANT dynamic logic | C.-C. Wang and K.-C. Tsai | |
| 1997/8/1 | 研討會論文 | A low-power high-speed FPGA logic module for DSP-specific applications’ design | C.-C. Wang and H.-M. Yang | |
| 1997/6/1 | 研討會論文 | Low power technology mapping by hiding high-transition paths in invisible edges for LUT-based FPGAs | C.-C. Wang and C.-P. Kwan | |
| 1996/8/1 | 研討會論文 | A study for swtich count reduction of FPGA by doubling flexibility of logic block | C.-C. Wang and C.-F. Huang | |
| 1996/5/1 | 研討會論文 | Hardware realization of multi-valued exponential bidirectional associative memory using current-mode circuits | C.-C. Wang and Y.-C. Chen | |
| 1995/12/1 | 研討會論文 | Digital design of discrete exponential bidirectional associative memory | C.-C. Wang and C.-L. Fan | |
| 1995/12/1 | 研討會論文 | Power estimation of internal nodes for finite state machine using Gray code encoding in state assignment | C.-C. Wang and M.-D. Jeng | |
| 1995/12/1 | 研討會論文 | Realization of asymptotically stable multi-valued exponential bidirectional associative memory by current-mode VLSI circuit | C.-C. Wang and Y.-C. Chen | |
| 1995/12/1 | 研討會論文 | Realization of bidirectional associative memory using a pseudo-parallel searching approach | C.-C. Wang and I.-H. Horng | |
| 1995/12/1 | 研討會論文 | VLSI implementation of multi-valued exponential bidirectional associative memory using current-mode circuits | C.-C. Wang and Y.-C. Chen | |
| 1995/10/1 | 研討會論文 | Current-mode implementation of asymptotically stable multi-valued exponential bidirectional associative memory | C.-C. Wang and Y.-C. Chen | |
| 1995/10/1 | 研討會論文 | Power reduction for finite state machine by using Gray code encoding in state assignment | C.-C. Wang and M.-D. Jeng | |
| 1995/8/1 | 研討會論文 | Low-power state assignment by greedy state pair grouping | C.-C. W ang and Y.-L. Fan | |
| 1995/8/1 | 研討會論文 | Transition reduction for finite state machine using modified Huffman encoding algorithm | C.-C. Wang and M.-D. Jeng | |
| 1995/5/1 | 研討會論文 | Analysis and current-mode implementation of asymptotically stable exponential bidirectional associative memory | C.-C. Wang and J.-M. Wu | |
| 1995/4/1 | 研討會論文 | Digital bidirectional associative memory using a pseudo-parallel searching approach | C.-C. Wang and I.-H. Horng | |
| 1995/4/1 | 研討會論文 | Digital realization of exponential bidirectional associative memory with dynamic storage | C.-C. Wang and C.-L. Fan | |
| 1994/12/1 | 研討會論文 | The absolute lowbound of the radix of multi-level discrete exponential bidirectional associative memories | C.-C. Wang, S.-M. Hwang, and J.-P. Lee | |
| 1994/12/1 | 研討會論文 | The asymptotical stability of multi-level discrete exponential bidirectional associative memory | C.-C. Wang, S.-M. Hwang, and J.-P. Lee | |
| 1994/11/1 | 研討會論文 | The absolute lowbound for the radix of exponential bidirectional associative memory | C.-C. Wang and J.-P. Lee | |
| 1994/10/1 | 研討會論文 | Data compression by the recursive algorithm of exponential bidirectional associative memory | C.-C. Wang and C.-R. Tsai | |
| 1994/6/1 | 研討會論文 | An analysis of practical capacity of exponential bidirectional associative memory | C.-C. Wang and C.-R. Tsai | |
| 1994/6/1 | 研討會論文 | Searching algorithms of the optimal radix of exponential bidirectional associative memory | C.-C. Wang and J.-P. Lee | |
| 1993/10/1 | 研討會論文 | The decision making rule of multiple exponential bidirectional associative memories | C.-C. Wang and J.-P. Lee | |
| 1993/6/1 | 研討會論文 | Measurement for fuzzy conditioning | C.-C. Wang and H.-S. Don | |
| 1993/6/1 | 研討會論文 | Microstrip circuit design using neural networks | T.-S. Horng, C.-C. Wang, and N. G. Alexopoulos | |
| 1993- | 研討會論文 | A modified measure for fuzzy subsethood | C.-C. Wang and H.-S. Don | |
| 1992/9/1 | 研討會論文 | A centralized multi-BAM network for thinking behaviors of the evidential reasoning | C.-C. Wang and H.-S. Don | |
| 1992/6/1 | 研討會論文 | High-capacity discrete exponential BAM | C.-C. Wang and H.-S. Don | |
| 1992/5/1 | 研討會論文 | A continuous belief function model for evidential reasoning | C.-C. Wang and H.-S. Don | |
| 1992/3/1 | 研討會論文 | Robust measures for fuzzy entropy and fuzzy conditioning | C.-C. Wang and H.-S. Don | |
| 1991/11/1 | 研討會論文 | Evidential reasoning using neural networks | C.-C. Wang and H.-S. Don | |
| 1991/10/1 | 研討會論文 | A geometrical approach to evidential reasoning | C.-C. Wang and H.-S. Don | |
| 1991/3/1 | 研討會論文 | A new approach to evidential reasoning by a potential model | C.-C. Wang and H.-S. Don |
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