會議論文- Tsung-Chuan Huang
| 編號 | 著作名稱 |
| 1 | 2. Tsung-Chuan Huang and Chin-Yi Yao, "Slot allocation strategy for clustered ad hoc networks," The 2005 Workshop on Wireless, Ad Hoc, and Sensor Networks, pp. 471-478, Jul. 2005. |
| 2 | Song-Wei Lin and Tsung-Chuan Huang, "A new efficient and realistic polling scheme for Bluetooth," The Second IASTED International Multi-Conference on Automation, Control, and Information Technology (ACIT 2005), pp. 117-122, Jun. 2005. |
| 3 | Tung-Shou Pan and Tsung-Chuan Huang, "A polling scheme for Bluetooth piconets considering on both uplink and downlink queues," The Second IASTED International Multi-Conference on Automation, Control, and Information Technology (ACIT 2005), pp. 123-128, Jun. 2005. |
| 4 | 5. Tsung-Chuan Huang and Tung-Shou Pan, "Consideration on both uplink and downlink queue polling scheme for Bluetooth piconets," 11th Mobile Computing Workshop, pp. 599-604, Mar. 2005. |
| 5 | 4. Tsung-Chuan Huang and Song-Wei Lin, "A new efficient polling scheme for Bluetooth piconets," 11th Mobile Computing Workshop, pp. 302-307, Mar. 2005. |
| 6 | Tsung-Chuan Huang, Chun-Kai Liao and Chi-Ren Dow, "Zone-based hierarchical routing in two-tier backbone ad hoc networks," 12th IEEE International Conference on Networks (ICON 2004), pp. 650-654, Nov. 2004. |
| 7 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Han-Chun Ke, "A double-manager k-hop clustering algorithm in mobile ad hoc networks," The fourth International Conference on Computer and Information Technology, pp. 640-645, Sep. 2004. |
| 8 | Tsung-Chuan Huang, Song-Ying Lee, Chao-Chieh, and Tzuen-Lih Chern, "An efficient on-demand point-to-point piconet formation scheme(ODP2P) for Bluetooth personal area network," The fourth International Conference on Computer and Information Technology, pp. 424-429, Sep. 2004. |
| 9 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Kai-Yu Tsai, "An adaptive scatternet formation scheme in Bluetooth personal area networks," The fourth International Conference on Computer and Information Technology, pp. 606-611, Sep. 2004. |
| 10 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Yan-Feng Chen, "A power-based clustering algorithm for wireless ad-hoc networks," The 2004 International Conference on Embedded and Ubiquitous Computing, pp. 591-600, Aug. 2004. |
| 11 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Jen-Yen Lee, "A multi-ring scatternet topology for Bluetooth networks with self-routing mechanism," 13th IST Mobile & Wireless Communications Summit 2004, pp. 186-190, Jun. 2004. |
| 12 | Slo-Li Chu and Tsung-Chuan Huang, "A new code scheduling mechanism for a processor-in-memory architecture," The 10th Workshop on Compiler Techniques for High-Performance Computing, pp. 42-51, Mar. 2004. |
| 13 | Sheng-Feng Yang, Tsung-Chuan Huang, Chu-Sing Yang, and Sheng-Wen Bai, "A self-determinant scatternet formation algorithm for multi-hop Bluetooth networks," 2003 ICPP Workshops on High Performance Scientific Engineering Computing with Application, pp. 289-296, Oct. 2003. |
| 14 | Tsung-Chuan Huang, Chu-Sing Yang, Chen-Chi Wu, and Sheng-Wen Bai, "A route optimization method for mobile IP using MMA (Middle Mobility agent," The Seventh International Conference on Computer Science and Informatics, pp. 377-380, Sep. 2003. |
| 15 | Tsung-Chuan Huang and Po-Hsueh Hsu, "An efficient run-time parallelizing scheme for wavefront scheduling," The Seventh International Conference on Computer Science and Informatics, pp. 580-583, Sep. 2003. |
| 16 | Tsung-Chuan Huang, Chu-Sing Yang, Chao-Chieh Huang, and Sheng-Wen Bai, "Hierarchical Grown Bluetree (HGB) – an effective topology for Bluetooth scatternets," International Symposium on Parallel and Distributed Processing and Applications, pp. 152-164, Jul. 2003. |
| 17 | Tsung-Chuan Huang, Slo-Li Chu, and Yu-Wen Shu, "A list-based low power scheduling technique for intelligent memory system," The Second International Conference on Information and Management Sciences, pp. 300-305, Jun. 2003. |
| 18 | Slo-Li Chu and Tsung-Chuan Huang, "SAGE: an automatic analyzing system for a new high-performance SoC Architecture–processor-in-memory," The Ninth Workshop on Compiler Techniques for High-Performance Computing, pp. 1-10, Mar. 2003. |
| 19 | Tsung-Chuan Huang, Chu-Sing Yang, Sheng-Wen Bai, and Szu-Hsuan Wang, "An agent and profile management system for mobil users and service providers," The International Conference on Advanced Information Networking and Applications (AINA), pp. 574-577, Mar. 2003. |
| 20 | Tsung-Chuan Huang, Chu-Sing Yang, Sheng-Wen Bai and Kuo-Cheng Lin, "A mobile service environment for handheld devices using XML-RPC," 2002 International Computer Symposium, pp. 384-390, Dec. 2002. |
| 21 | Yu-Ju Chen, Tsung-Chuan Huang and Rey-Chue Hwang, "Power signal prediction by neural network with a new fuzzy BP learning algorithm," 2002 IEEE International Conference on Industrial technology, pp. 845-849, Dec. 2002. |
| 22 | Tsung-Chuan Huang, Chu-Sing Yang, Sheng-Wen Bai and Chia-Hung Kao, "An intelligent architecture for personal information management," The 15th International Conference on Parallel and Distributed Computing Systems, pp. 349-354, Sep. 2002. |
| 23 | Tsung-Chuan Huang and Po-Hsueh Hsu, "An efficient parallel scheme for run-time scheduling," The 19th Workshop on Combinatorial Mathematics and Computation Theory, pp. 234-243, Mar. 2002. |
| 24 | Slo-Li Chu, Tsung-Chuan Huang and Lan-Chi Lee, "Several optimizing schemes for processor-in-memory architectures," The Eighth Workshop on Compiler Techniques for High-Performance Computing, pp. 11-20, Mar. 2002. |
| 25 | Tsung-Chuan Huang and Slo-Li Chu, "A comprehensive statement-based analysis system for tightly-coupled heterogeneous environments," The 14th International Conference on Parallel and Distributed Computing Systems, pp. 248-253, Aug. 2001. |
| 26 | Slo-Li Chu, Tsung-Chuan Huang and Lan-Chi Lee, "Improving workload balance and code optimization in processor-in-memory," 2001 International Conference on Parallel and Distributed Systems, pp. 273-278, Jun. 2001. |
| 27 | Tsung-Chuan Huang and Slo-Li Chu, "“A New Analysis Approach for Intelligent Memory Systems,”," The 16th International Conference on Computers and Their Applications, Mar. 2001. |
| 28 | Tsung-Chuan Huang and Slo-Li Chu, "A parallelizing framework for intelligent memory architectures," The Seventh Workshop on Compiler Techniques for High-Performance Computing, pp. 96-102, 2001. |
| 29 | Tsung-Chuan Huang, Po-Hsueh Hsu and Chi-Fan Wu, "“An Efficient Run-Time Scheme for Exploiting Parallelism on Multiprocessor Systems”," The 2000 International Conference on High Performance Computing(HiPC2000), Bangalore, India, pp. 27-36, Nov. 2000. |
| 30 | Tsung-Chuan Huang and Slo-Li Chu, "“SAGE: A New Analysis and Optimization System for FlexRAM Architecture,”," The Second Workshop on Intelligent Memory Systems, Boston, USA, Oct. 2000. |
| 31 | Tsung-Chuan Huang, Chi-Fan Wu, and Po-Hsueh Hsu, "“Efficient Wavefront Scheduling for Irregular Loops”," The Fourth World Multiconference on Systemics, Cybernetics and Informatics (SCI’2000), Orlando, U.S.A, Vol. 7, pp. 555-560, Jul. 2000. |
| 32 | Tsung-Chuan Huang and Liang-Cheng Shiu, "“Efficient Local Memory Access Sequence Generation for Subscripts Containing Multiple Induction variables,”," The 13th International Conference on Parallel and Distributed Computing Systems, Las Vegas, U.S.A, pp. 580-585, Jul. 2000. |
| 33 | Tsung-Chuan Huang and Cheng-Ming Yang, "“A Loop Parallelization Technique for Nonlinear Expression”," The Sixth Workshop on Compiler Techniques for High-Performance Computing, pp. 77-84, 2000. |
| 34 | Tsung-Chuan Huang, Yi-Chang Chen, Po-Hsueh Hsu, Chi-Fan, and Lai-Fwu Wang, "“Automatic Parallelism Extraction for Irregular Programs,”," The Sixth Workshop on Compiler Techniques for High-Performance Computing, pp. 85-89, 2000. |
| 35 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Hwa-Jyh Jean, "“The Local Memory Access Sequence of Multiple Induction Variables on Distributed Memory Machines,”," The Sixth Workshop on Compiler Techniques for High-Performance Computing, pp. 180-186, 2000. |
| 36 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Yi-Jay Lin, "“Efficient Memory Access Sequence Generation for Coupled Subscripts in Data-Parallel Programs,”," The Third World Multiconference on Systemics, Cybernetics and Informatics (SCI’99), Orlando, U.S.A, Vol. 5, pp. 151-156, Jul. 1999. |
| 37 | Tsung-Chuan Huang, Yi-Chang Chen, and Li-Wen Chung, "”X-Prediction Mechanism for Improving Interference in Two-Level-Adaptive Branch Prediction,”," The 1999 International Conference on Parallel and Distributed Processing Techniques and Applications, Las Vegas, U.S.A, pp. 1175-1181, Jun. 1999. |
| 38 | Liang-Cheng Shiu, Tsung-Chuan Huang, and Yi-Jay Lin, "Iteratin Sets Computation for Array References with Coupled Subscripts," The Fifth Workshop on Compiler Techniques for High-Performance Computing, pp. 97-102, 1999. |
| 39 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Jei-Hsiang Huang, "Local Memory Access Sequence Generation in Data Parallel Programs Using Permutation," 12th International Conference on Parallel00 and Distributed Computing Systems( PDCS'99), For Lauderdale, U.S.A., pp. 345-350, 1999. |
| 40 | 23. Tsung-Chuan Huang and Cheng-Ming Yang, "Further results for improving loop interchange in non-adjacent and imperfectly nested loops," Third International Workshop on High-Level Parallel Programming Models and Supportive Environments, pp. 93-99, Apr. 1998. |
| 41 | Li-Wen Chung, Tsung-Chuan Huang, and Yi-Chang Chen, "Reducing Pattern History Table Interference by Dynamic Selecting Branch History," The Fourth Workshop on Compiler Techniques for High-Performance Computing, pp. 36-42, 1998. |
| 42 | T. C. Huang, Liang-Cheng Shiu and Cherug-Haw Yu, "Efficient communication sets generation for parallelizing compiler on distributed memory machines," The 11th Annual International Symposium on High Performance Computing Systems, pp. 473-482, Jul. 1997. |
| 43 | T. C. Huang, Po-Hsueh Hsu and Ji-Hsiang Lee, "An efficient run-time parallelization technique: Parallel group analysis," The 11th Annual International Symposium on High Performance Computing Systems, Winnipeg, Canada, pp. 353-362, 1997. |
| 44 | Tsung-Chuan Huang, Po-Hsueh Hsu, and Tze-Nan Sheng, "Efficient Run-Time Scheduling for Parallelizing Partially Parallel Loops," The IEEE Third International Conference on Algorithm and Architectures for Parallel Processing, Melbourne, Australia, pp. 397-404, 1997. |
| 45 | Tsung-Chuan Huang, Liang-Cheng Shiu, and Cherng-Haw Yu, "Generating Communication Sets Efficiently on Data-Parallel Programs," The IEEE Third International Conference on Algorithm and Architectures for Parallel Processing, Melbourne, Australia, pp. 397-404, 1997. |
| 46 | Hsi-Hsuan Hsiao and Tsung-Chuan Huang, "Design of Efficient Selective Block Repeat Protocals with Finite Sequence Numbers," International Symposium on Multimedia Information Processing, Taipei, pp. 180-187, 1997. |
| 47 | T. C. Huang, and Po-Hsueh Hsu, "The SPNT test: A new technology for run-time speculative paralleization of loops," The 10th International Workshop on Languages and Compilers for Parallel Computing, Minneapolis, U.S.A., pp. 177-191, 1997. |
| 48 | Tze-Nan Sheng, Po-Hsueh Hsu and T. C. Huang, "Scheduling the partially parallel loops at run-time," The Third Workshop on Compiler Techniques for High-Performance Computing, pp. 104-113, 1997. |
| 49 | T. C. Huang, Ming-Jer Lee, and C. S. Yang, "A debugger for distributed programs," Proceedings of the Second Workshop on Compiler Techniques for High-Performance Computing, pp. 195-203, 1996. |
| 50 | T. C. Huang and Tai-Hsiang Tsai, "Data alignment for parallelizing compiler on distributed-memory multiprocessors," Proceedings of International Conference on Computer Architecture, pp. 178-184, 1996. |
| 51 | T. C. Huang and Li-Wei Chu, "The analysis and detection method for nondeterminacy in parallel/distributed program," Proceedings of International Conference on Computer Architecture, pp. 90-97, 1996. |
| 52 | T. C. Huang and C. M. Yang, "An exact data dependence analysis for array reference: The IR test," Proceedings of the 10th Annual International Symposium on High-Performance Computer, pp. 1-24, 1996. |
| 53 | T. C. Huang, Shih-Fang Kuo, and Tai-Hsiang Tsai, "Data distribution techniques for parallelizing compilers on distributed memory multiprocessors," Proceedings of the Second Workshop on Compiler Techniques for High-Performance Computing, pp. 67-76, 1996. |
| 54 | T. C. Huang, C. M. Yang, and C. Y. Chang, "A new approach to data dependence analysis and its implementation - The interval reduction Test," Proceedings of the Second Workshop on Compiler Techniques for High-Performance Computing, pp. 107-113, 1996. |
| 55 | Y. C. Chen, T. C. Huang, C. S. Yang, and L. C. Shiu, "The study of seducing branch penalty by hardware," IEEE First International Conference on Algorithms and Architectures for Parallel Processing, Brisbane, Australia, pp. 599-602, Apr. 1995. |
| 56 | T. C. Huang, C. M. Yang, and C. S. Yang, "Loop interchange with loops containing control dependence," Proceedings of the First Workshop on Compiler Techniques for High-Performance Computing, pp. 30-41, 1995. |
| 57 | T. C. Huang and Z. W. Wang, "An implementation of load sharing service on OSF DCE," Proceedings of National Computer Symposium, pp. 503-511, 1995. |
| 58 | T. C. Huang and J. L. Lee, "Concurrent deletion in AVL trees," The First Symposium on Computer and Communication Technology, pp. 49-55, 1995. |
| 59 | J. F. Wang and T. C. Huang, "Parallel permutations on the generalized Boolean n-cube network," International Symposium on Computer Architecture & Digital Signal Processing, Hong Kong, pp. 415-425, 1989. |
| 60 | T. C. Huang, J. F.Wang, and J. Y. Lee, "An integrated CAD system for the ship electrical layout and routing design," 14th IASTED International Conference: Applied Simulation and Modelling, Canada, pp. 116-119, 1986. |
| 61 | F. Victor Lu, Tse-Sheng Chen, and Tsung-Chuan Huang, "Hierarchical information structures for plant germplasm," Proceedings of ISMM International Symposium 1984, pp. 235-238, 1984. |
| 62 | T. C. Huang, J. F. Wang, and J. Y. Lee, "Computer aided 3D cable routing for electrical system of the shipbuilding," Proceedings of International Computer Symposium 1984, pp. 404-410, . |
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