期刊論文-Jyi-Tsong Lin
| 出版年月 | 著作類別 | 著作名稱 | 作者 |
| Aug-24 | 期刊論文 | FS-iTFET: Advancing Tunnel FET Technology with Schottky-Inductive Source and GAA Design | Jyi-Tsong Lin, Wei-Heng Tai |
| Jul-24 | 期刊論文 | Enhancement noise margin and delay time performance of novel punch-through nMOS for single-carrier CMOS | Lin, JT., Xie, PZ. & Lee, WH. |
| Jul-24 | 期刊論文 | Nanosheet integration of induced tunnel field-effect transistor with lower cost and lower power | Lin, JT., Kuo, CY. |
| Nov-23 | 期刊論文 | Ge/GaAs Heterostructure TFET With Schottky Contact to Suppress Ambipolar and Trap-Assisted Tunneling | Jyi-Tsong Lin,Hong-Syue Ho |
| Oct-23 | 期刊論文 | Bilateral sidewall engineering Si1–xGex iTFET for low power display application | Jyi-Tsong Lin and Chun-Ju Chu |
| Oct-23 | 期刊論文 | Investigation of SiGe/Si heterojunction inductive line tunneling TFET with source Schottky contact for prospect ultra-low power applications | Jyi-Tsong Lin and R.-K. Young |
| Sep-23 | 期刊論文 | Enhancing subthreshold slope and ON-current in a simple iTFET with overlapping gate on source-contact, drain Schottky contact, and intrinsic SiGe-pocket. | Lin, JT., Lin, KP. & Cheng, KM. |
| Aug-23 | 期刊論文 | Inductive line tunneling FET using epitaxial tunnel layer with Ge-source and charge enhancement insulation. | Lin, JT., Chang, YC |
| Jul-23 | 期刊論文 | A new line tunneling SiGe/Si iTFET with control gate for leakage suppression and subthreshold swing improvement | Lin, JT., Weng, SC. |
| Feb-19 | 期刊論文 | Improving charge retention in capacitorless DRAM through material and device innovation | M.H.R. Ansari, N. Navlakha, J.-T. Lin, and A. Kranti |
| Jan-19 | 期刊論文 | 1T-DRAM With Shell-Doped Architecture | Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, Abhinav Kranti |
| Jan-19 | 期刊論文 | Raised Body Doping-Less 1T-DRAM with Source/Drain Schottky Contact | Jyi-Tsong Lin, Wei-Tse Sun, Hung-Hsiu Lin, Yi-Jie Chen, Nupur Navlakha, and Abhinav Kranti |
| Jan-19 | 期刊論文 | Symmetrical and Crossed Double-Sided Passivation Emitter and Surface Field Solar Cells for Bifacial Applications | Jyi-Tsong Lin, Kon-Yu Ho, Steve W. Haga, Wen-Hao Chen |
| Dec-18 | 期刊論文 | A Novel Recessed-Gate PN iTFET to Improve Subthreshold Swing and Suppress Ambipolar* | Yu-Jhe Li, Jyi-Tsong Lin, Chih-Ting Yeh |
| Dec-18 | 期刊論文 | An Emitter-Wrap-Through Solar Cell with Both-Side Collection for Bifacial Applications* | Jyi-Tsong Lin, Yu-Yan Hu, Chung-Tse Lee, Kon-Yu Ho, and Steve W. Haga |
| Dec-18 | 期刊論文 | Raised Body Doping-Less 1T-DRAM with Source/Drain Schottky Contact | Jyi-Tsong Lin, Wei-Tse Sun, Hung-Hsiu Lin, Yi-Jie Chen, Nupur Navlakha,Abhinav Kranti |
| Dec-18 | 期刊論文 | Recessed-and-Shifted Back-Surface-Field Crystalline Silicon Solar Cells with Heterojunctions for Bifacial Applications* | Jyi-Tsong Lin, Wen-Hao Chen, Steve Haga, Kung-Yu Ho,Shi-Qin Huang |
| Dec-18 | 期刊論文 | Symmetrical and Crossed Double-sided Passivation Emitter and Surface Field Solar Cells for Bifacial Applications | Jyi-Tsong Lin, Kon-Yu Ho, Steve W. Haga and Wen-Hao Chen |
| Dec-18 | 期刊論文 | Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM* | Jyi-Tsong Lin, Yu-Yan Hu, Chung-Tse Lee, Kon-Yu Ho, and Steve W. Haga |
| Jul-18 | 期刊論文 | High Retention With n-Oxide-pJunctionless Architecture for 1T DRAM | Md.H.R. Ansari, N. Navlakha, J.-T. Lin, and A. Kranti |
| Mar-18 | 期刊論文 | A High-Efficiency HIT Solar Cell with Pillar Texturing | Jyi-Tsong Lin, Chien-Chia Lai, Chung-Tse Lee, Yu-Yan Hu, Kon-Yu Ho, and Steve Haga |
| Mar-18 | 期刊論文 | Doping Dependent Assessment of Accumulation Mode and Junctionless FET for 1T DRAM | Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, and Abhinav Kranti |
| Mar-18 | 期刊論文 | Double-sided Symmetrical and Crossed Emitter Crystalline Silicon Solar Cells with Heterojunctions for Bifacial Applications | Jyi-Tsong Lin, Chung-Tse Lee, Wen-Hao Chen, Yu-Yan Hu, and Steve Haga |
| Feb-18 | 期刊論文 | Characteristics of Gate-All-Around Vertical Channel 1T-DRAM with a Pass-Way Trench* | Jyi-Tsong Lin, Chih-Kai Huang, Abhinav Kranti, Ting-Pi Hsu,Nupur Navlakha, Chih-Chia Lin, Cyuan-You Yu,Po-Hsieh Lin |
| Feb-18 | 期刊論文 | Characteristics of Recessed-Gate TFETs with Line Tunneling | Jyi-Tsong Lin, Tzu-Chi Wang, Wei-Han Lee, Chih-Ting Yeh, Stefan Glass and Qing-Tai Zhao |
| Dec-17 | 期刊論文 | Vertical Transistor With n-Bridge and Body on Gate for Low-Power 1T-DRAM Application | Jyi-Tsong Lin, Hung-Hsiu Lin, Yi-Jie Chen, Cyuan-You Yu, Abhinav Kranti, Chih-Chia Lin, and Wei-Han Lee |
| Apr-17 | 期刊論文 | Retention and Scalability Perspective of Sub-100 nm Double Gate Tunnel FET DRAM | Nupur Navlakha, Jyi-Tsong Lin,Abhinav Kranti |
| Jan-17 | 期刊論文 | A New Electron Bridge Channel 1T-DRAM Employing Underlap Region Charge Storage | Jyi-Tsong Lin; Wei-Han Lee; Po-Hsieh Lin; Steve W. Haga; Yun-Ru Chen; Abhinav Kranti |
| Sep-16 | 期刊論文 | Improved Retention Time in Twin Gate 1T DRAM With Tunneling Based Read Mechanism | Nupur Navlakha, Jyi-Tsong Lin, and Abhinav Kranti |
| Aug-16 | 期刊論文 | The Film Thickness Effect on Electrical Conduction Mechanisms and Characteristics of the Ni-Cr Thin Film Resistor | Nai-Chuan Chuang, Jyi-Tsong Lin, Ting-Chang Chang, Tsung-Ming Tsai, Kuan-Chang Chang, Chih-Wei Wu |
| Jun-16 | 期刊論文 | Improving retention time in tunnel field effect transistor based dynamic memory by back gate engineering | Nupur Navlakha, Jyi-Tsong Lin, and Abhinav Kranti |
| Mar-16 | 期刊論文 | Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs | Chun-Yu Chen, Jyi-Tsong Lin, and Meng-Hsueh Chiang |
| Dec-15 | 期刊論文 | Fabrication variability in multiple gate MOSFETs: a bulk FinFET study | Chun-Yu Chen, Jyi-Tsong Lin, and Meng-Hsueh Chiang, |
| Nov-15 | 期刊論文 | Annealing effect on the electrical properties and composition of a NiCrAl thin film resistor | Nai-Chuan Chuang, Jyi-Tsong Lin, and Huey-Ru Chen , |
| Jun-15 | 期刊論文 | Interfacial reaction and co-firing behavior between Ni–Zn–Cu ferrite/Al2O3–SiO2–B2O3 glass-ceramic | Nai-Chuan Chuang, Jyi-Tsong Lin, and Huey-Ru Chen, |
| May-15 | 期刊論文 | TCR control of Ni-Cr resistive film deposited by DC magnetron sputtering | Nai-Chuan Chuang, Jyi-Tsong Lin, and Huey-Ru Chen, |
| Mar-15 | 期刊論文 | A Steep Subthreshold Swing Technique for Gate-All-Around SOI MOSFETs | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang, and Wei-Chou Hsu, |
| Feb-15 | 期刊論文 | Block-Oxide Source/Drain-Tie Polycrystalline Silicon Thin-Film Transistor with Additional Polycrystalline Silicon Body for Analog Applications | Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng |
| Jan-15 | 期刊論文 | Transient and Thermal Analysis on Disturbance Immunity for 4F2 Surrounding Gate 1T-DRAM with Wide Trenched Body | Jyi-Tsong Lin, Po-Hsieh Lin, Steve W. Haga, Yu-Chun Wang, and Dai-Rong Lu |
| Aug-14 | 期刊論文 | Multi-function Behavior of a Vertical MOSFET with Trench Body Structure and New Erase Mechanism for Use in 1T-DRAM | Jyi-Tsong Lin, Po-Hsieh Lin |
| May-14 | 期刊論文 | Optimal Design of Gate-All-Around SOI MOSFETs | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang |
| Feb-14 | 期刊論文 | Investigation of discrete dopant induced variability in silicon nanowire MOSFETs using 3D simulation | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang |
| Feb-14 | 期刊論文 | Performance Optimization for the Sub-22 nm Fully Depleted SOI Nanowire Transistors | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang |
| Jun-13 | 期刊論文 | A Novel Vertical SOI-Based 1T-DRAM with Trench-Body Structure | Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng, and Yun-Ru Chen |
| Feb-13 | 期刊論文 | A Novel Nanoscale FDSOI MOSFET with Block-Oxide | Jyi-Tsong Lin, Yi-Chuen Eng and Po-Hsieh Lin |
| Aug-12 | 期刊論文 | An Experimental Study of Block-Oxide Source/Drain-Tied Polycrystalline Silicon Thin-Film Transistors with Additional Polycrystalline Silicon Body | Jyi-Tsong Lin, Yi-Chuen Eng, and Yi-Hsuan Fan |
| Jun-12 | 期刊論文 | Characteristics of a Smiling Polysilicon Thin-Film Transistor | Jyi-Tsong Lin, Tzu-Feng Chang, Yi-Chuen Eng, Po-Hsieh Lin, Cheng-Hsin Chen |
| May-12 | 期刊論文 | A Novel L-shaped MOSFET | Po-Hsieh Lin, Jyi-Tsong Lin |
| Oct-11 | 期刊論文 | Additional-Body Effects in a Self-Aligned Deca-Nanometer Ultrathin-Body and Buried Oxide Silicon-On-Insulator Metal-Oxide Semiconductor Field-Effect Transistor: Three-Dimensional Simulation Study | Jyi-Tsong Lin, Yi-Chuen Eng, Cheng-Hsin Chen, and Yi-Hsuan Fan |
| Aug-11 | 期刊論文 | A Three-Dimensional Simulation Study of Source/Drain-Tied Double-Gate Fin Field-Effect Transistor Design for 16-nm Half-Pitch Technology Generation and Beyond | Yi-Chuen Eng, Jyi-Tsong Lin, Tzu-Feng Chang, Chun-Yu Chen, Yi-Hsuan Fan, Cheng-Hsin Chen, and Po-Hsieh Lin |
| May-11 | 期刊論文 | A New TFT with Trenched Body and Airgap-insulated Structure for Capacitorless 1T-DRAM Application | Cheng-Hsin Chen, Jyi-Tsong Lin, Tzu-Feng Chang, Yi-Chuen Eng, Po-Hsieh Lin, Yu-Che Chang |
| May-11 | 期刊論文 | Numerical Study of a Highly Scaled Bulk MOSFET With Block Oxide and Source/Drain-Tied Structure | Yi-Chuen Eng, Jyi-Tsong Lin, Senior Member, IEEE, Chih-Hao Kuo,Po-Hsieh Lin, Yi-Hsuan Fan, and Hsuan-Hsu Chen |
| Nov-10 | 期刊論文 | A Novel Vertical MOSFET with bMPI Structure for 1T-DRAM Applications: A 2-D Numerical Study | Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hsieh Lin, Hsien-Nan Chiu, Tzu-Feng Chang |
| Nov-10 | 期刊論文 | A Simulation Study of Junctionless Pseudo Tri-gate Vertical MOSFETs for RF/Analog Applications | Yu-Che Chang, Jyi-Tsong Lin, Yi-Chuen Eng |
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