期刊論文-Jyi-Tsong Lin
| 出版年月 | 著作類別 | 著作名稱 | 作者 | 收錄出處 |
| 2025-01-01 | 期刊論文 | Design and Circuit Applications of PTnMOSFET Devices from Planar to Gate-All-Around Structures | Jyi-Tsong Lin, Yuan-Yu Chuang | Discover Electronics |
| 2024-12-01 | 期刊論文 | Novel Single-Carrier Punchthrough CMESFET | J. -T. Lin and P. -H. Chen | IEEE Transactions on Electron Devices |
| 2024-12-01 | 期刊論文 | Novel structure of Fin-iTFET with main gate and source metal formed simultaneously while control gate and drain formed simultaneously | Jyi-Tsong Lin and Yung-Hsin Lin | Physica Scripta |
| 2024-08-01 | 期刊論文 | FS-iTFET: Advancing Tunnel FET Technology with Schottky-Inductive Source and GAA Design | Jyi-Tsong Lin, Wei-Heng Tai | Discover Nano |
| 2024-07-01 | 期刊論文 | Enhancement noise margin and delay time performance of novel punch-through nMOS for single-carrier CMOS | Lin, JT., Xie, PZ. and Lee, WH. | Discover Nano |
| 2024-07-01 | 期刊論文 | Nanosheet integration of induced tunnel field-effect transistor with lower cost and lower power | Lin, JT., Kuo, CY. | Discover Nano |
| 2023-11-01 | 期刊論文 | Ge/GaAs Heterostructure TFET With Schottky Contact to Suppress Ambipolar and Trap-Assisted Tunneling | Jyi-Tsong Lin,Hong-Syue Ho | IEEE Transactions on Electron Devices |
| 2023-10-01 | 期刊論文 | Bilateral sidewall engineering Si1–xGex iTFET for low power display application | Jyi-Tsong Lin and Chun-Ju Chu | Nanotechnology |
| 2023-10-01 | 期刊論文 | Investigation of SiGe/Si heterojunction inductive line tunneling TFET with source Schottky contact for prospect ultra-low power applications | Jyi-Tsong Lin and R.-K. Young | Nanotechnology |
| 2023-09-01 | 期刊論文 | Enhancing subthreshold slope and ON-current in a simple iTFET with overlapping gate on source-contact, drain Schottky contact, and intrinsic SiGe-pocket. | Lin, JT., Lin, KP. and Cheng, KM. | Discover Nano |
| 2023-08-01 | 期刊論文 | Inductive line tunneling FET using epitaxial tunnel layer with Ge-source and charge enhancement insulation | Lin, JT., Chang, YC | Discover Nano |
| 2023-07-01 | 期刊論文 | A new line tunneling SiGe/Si iTFET with control gate for leakage suppression and subthreshold swing improvement | Lin, JT., Weng, SC. | Discover Nano |
| 2019-02-01 | 期刊論文 | Improving charge retention in capacitorless DRAM through material and device innovation | M.H.R. Ansari, N. Navlakha, J.-T. Lin, and A. Kranti | Japanese Journal of Applied Physics |
| 2019-01-01 | 期刊論文 | 1T-DRAM With Shell-Doped Architecture | Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, Abhinav Kranti | IEEE Transactions on Electron Devices |
| 2019-01-01 | 期刊論文 | Raised Body Doping-Less 1T-DRAM with Source/Drain Schottky Contact | Jyi-Tsong Lin, Wei-Tse Sun, Hung-Hsiu Lin, Yi-Jie Chen, Nupur Navlakha, and Abhinav Kranti | IEEE Journal of the Electron Devices Society |
| 2019-01-01 | 期刊論文 | Symmetrical and Crossed Double-Sided Passivation Emitter and Surface Field Solar Cells for Bifacial Applications | Jyi-Tsong Lin, Kon-Yu Ho, Steve W. Haga, Wen-Hao Chen | IEEE Journal of the Electron Devices Society |
| 2018-12-01 | 期刊論文 | A Novel Recessed-Gate PN iTFET to Improve Subthreshold Swing and Suppress Ambipolar* | Yu-Jhe Li, Jyi-Tsong Lin, Chih-Ting Yeh | IEEE Journal of the Electron Devices Society |
| 2018-12-01 | 期刊論文 | An Emitter-Wrap-Through Solar Cell with Both-Side Collection for Bifacial Applications* | Jyi-Tsong Lin, Yu-Yan Hu, Chung-Tse Lee, Kon-Yu Ho, and Steve W. Haga | IEEE Transactions on Electron Devices |
| 2018-12-01 | 期刊論文 | Raised Body Doping-Less 1T-DRAM with Source/Drain Schottky Contact | Jyi-Tsong Lin, Wei-Tse Sun, Hung-Hsiu Lin, Yi-Jie Chen, Nupur Navlakha,Abhinav Kranti | IEEE Journal of the Electron Devices Society, |
| 2018-12-01 | 期刊論文 | Recessed-and-Shifted Back-Surface-Field Crystalline Silicon Solar Cells with Heterojunctions for Bifacial Applications* | Jyi-Tsong Lin, Wen-Hao Chen, Steve Haga, Kung-Yu Ho,Shi-Qin Huang | IEEE Journal of the Electron Devices Society |
| 2018-12-01 | 期刊論文 | Symmetrical and Crossed Double-sided Passivation Emitter and Surface Field Solar Cells for Bifacial Applications | Jyi-Tsong Lin, Kon-Yu Ho, Steve W. Haga and Wen-Hao Chen | IEEE Journal of the Electron Devices Society |
| 2018-12-01 | 期刊論文 | Vertical Double Gate Transistor with N-Bridge for Low Power 1T-DRAM* | Jyi-Tsong Lin, Yu-Yan Hu, Chung-Tse Lee, Kon-Yu Ho, and Steve W. Haga | IEEE Transactions on Electron Devices |
| 2018-07-01 | 期刊論文 | High Retention With n-Oxide-pJunctionless Architecture for 1T DRAM | Md.H.R. Ansari, N. Navlakha, J.-T. Lin, and A. Kranti | IEEE Transactions on Electron Devices |
| 2018-03-01 | 期刊論文 | A High-Efficiency HIT Solar Cell with Pillar Texturing | Jyi-Tsong Lin, Chien-Chia Lai, Chung-Tse Lee, Yu-Yan Hu, Kon-Yu Ho, and Steve Haga | IEEE Journal of Photovoltaics |
| 2018-03-01 | 期刊論文 | Doping Dependent Assessment of Accumulation Mode and Junctionless FET for 1T DRAM | Md. Hasan Raza Ansari, Nupur Navlakha, Jyi-Tsong Lin, and Abhinav Kranti | IEEE Transactions on Electron Devices |
| 2018-03-01 | 期刊論文 | Double-sided Symmetrical and Crossed Emitter Crystalline Silicon Solar Cells with Heterojunctions for Bifacial Applications | Jyi-Tsong Lin, Chung-Tse Lee, Wen-Hao Chen, Yu-Yan Hu, and Steve Haga | IEEE Journal of Photovoltaics |
| 2018-02-01 | 期刊論文 | Characteristics of Gate-All-Around Vertical Channel 1T-DRAM with a Pass-Way Trench* | Jyi-Tsong Lin, Chih-Kai Huang, Abhinav Kranti, Ting-Pi Hsu,Nupur Navlakha, Chih-Chia Lin, Cyuan-You Yu,Po-Hsieh Lin | ieee transactions on nanotechnology |
| 2018-02-01 | 期刊論文 | Characteristics of Recessed-Gate TFETs with Line Tunneling | Jyi-Tsong Lin, Tzu-Chi Wang, Wei-Han Lee, Chih-Ting Yeh, Stefan Glass and Qing-Tai Zhao | IEEE Transactions on Electron Devices |
| 2017-12-01 | 期刊論文 | Vertical Transistor With n-Bridge and Body on Gate for Low-Power 1T-DRAM Application | Jyi-Tsong Lin, Hung-Hsiu Lin, Yi-Jie Chen, Cyuan-You Yu, Abhinav Kranti, Chih-Chia Lin, and Wei-Han Lee | IEEE Transactions on Electron Devices |
| 2017-04-01 | 期刊論文 | Retention and Scalability Perspective of Sub-100 nm Double Gate Tunnel FET DRAM | Nupur Navlakha, Jyi-Tsong Lin,Abhinav Kranti | Transactions on Electron Devices |
| 2017-01-01 | 期刊論文 | A New Electron Bridge Channel 1T-DRAM Employing Underlap Region Charge Storage | Jyi-Tsong Lin; Wei-Han Lee; Po-Hsieh Lin; Steve W. Haga; Yun-Ru Chen; Abhinav Kranti | IEEE Journal of the Electron Devices Society |
| 2016-09-01 | 期刊論文 | Improved Retention Time in Twin Gate 1T DRAM With Tunneling Based Read Mechanism | Nupur Navlakha, Jyi-Tsong Lin, and Abhinav Kranti | IEEE Electron Device Letters |
| 2016-08-01 | 期刊論文 | The Film Thickness Effect on Electrical Conduction Mechanisms and Characteristics of the Ni-Cr Thin Film Resistor | Nai-Chuan Chuang, Jyi-Tsong Lin, Ting-Chang Chang, Tsung-Ming Tsai, Kuan-Chang Chang, Chih-Wei Wu | IEEE JEDS |
| 2016-06-01 | 期刊論文 | Improving retention time in tunnel field effect transistor based dynamic memory by back gate engineering | Nupur Navlakha, Jyi-Tsong Lin, and Abhinav Kranti | Journal of Applied Physics |
| 2016-03-01 | 期刊論文 | Subthreshold Kink Effect Revisited and Optimized for Si Nanowire MOSFETs | Chun-Yu Chen, Jyi-Tsong Lin, and Meng-Hsueh Chiang | IEEE Transactions on Electron Devices |
| 2015-12-01 | 期刊論文 | Fabrication variability in multiple gate MOSFETs: a bulk FinFET study | Chun-Yu Chen, Jyi-Tsong Lin, and Meng-Hsueh Chiang, | ECS J. Solid State Sci. Technol |
| 2015-11-01 | 期刊論文 | Annealing effect on the electrical properties and composition of a NiCrAl thin film resistor | Nai-Chuan Chuang, Jyi-Tsong Lin, and Huey-Ru Chen , | Japanese Journal of Applied Physics |
| 2015-06-01 | 期刊論文 | Interfacial reaction and co-firing behavior between Ni–Zn–Cu ferrite/Al2O3–SiO2–B2O3 glass-ceramic | Nai-Chuan Chuang, Jyi-Tsong Lin, and Huey-Ru Chen, | Journal of the Ceramic Society of Japan |
| 2015-05-01 | 期刊論文 | TCR control of Ni-Cr resistive film deposited by DC magnetron sputtering | Nai-Chuan Chuang, Jyi-Tsong Lin, and Huey-Ru Chen, | Vacuum |
| 2015-03-01 | 期刊論文 | A Steep Subthreshold Swing Technique for Gate-All-Around SOI MOSFETs | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang, and Wei-Chou Hsu, | ECS Transactions |
| 2015-02-01 | 期刊論文 | Block-Oxide Source/Drain-Tie Polycrystalline Silicon Thin-Film Transistor with Additional Polycrystalline Silicon Body for Analog Applications | Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng | IEEE/OSA JOURNAL OF DISPLAY TECHNOLOGY |
| 2015-01-01 | 期刊論文 | Transient and Thermal Analysis on Disturbance Immunity for 4F2 Surrounding Gate 1T-DRAM with Wide Trenched Body | Jyi-Tsong Lin, Po-Hsieh Lin, Steve W. Haga, Yu-Chun Wang, and Dai-Rong Lu | IEEE Transactions on Electron Device |
| 2014-08-01 | 期刊論文 | Multi-function Behavior of a Vertical MOSFET with Trench Body Structure and New Erase Mechanism for Use in 1T-DRAM | Jyi-Tsong Lin, Po-Hsieh Lin | IEEE Transactions on Electron Device |
| 2014-05-01 | 期刊論文 | Optimal Design of Gate-All-Around SOI MOSFETs | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang | Nano Communication |
| 2014-02-01 | 期刊論文 | Investigation of discrete dopant induced variability in silicon nanowire MOSFETs using 3D simulation | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang | International Journal of Nanotechnology |
| 2014-02-01 | 期刊論文 | Performance Optimization for the Sub-22 nm Fully Depleted SOI Nanowire Transistors | Chun-Yu Chen, Jyi-Tsong Lin, Meng-Hsueh Chiang | Solid-State Electronics |
| 2013-06-01 | 期刊論文 | A Novel Vertical SOI-Based 1T-DRAM with Trench-Body Structure | Jyi-Tsong Lin, Po-Hsieh Lin, Yi-Chuen Eng, and Yun-Ru Chen | IEEE Transactions on Electron Devices |
| 2013-02-01 | 期刊論文 | A Novel Nanoscale FDSOI MOSFET with Block-Oxide | Jyi-Tsong Lin, Yi-Chuen Eng and Po-Hsieh Lin | Active and Passive Electronic Components |
| 2012-08-01 | 期刊論文 | An Experimental Study of Block-Oxide Source/Drain-Tied Polycrystalline Silicon Thin-Film Transistors with Additional Polycrystalline Silicon Body | Jyi-Tsong Lin, Yi-Chuen Eng, and Yi-Hsuan Fan | IEEE TRANSACTIONS ON ELECTRON DEVICES |
| 2012-06-01 | 期刊論文 | Characteristics of a Smiling Polysilicon Thin-Film Transistor | Jyi-Tsong Lin, Tzu-Feng Chang, Yi-Chuen Eng, Po-Hsieh Lin, Cheng-Hsin Chen | IEEE ELECTRON DEVICE LETTERS |
| 2012-05-01 | 期刊論文 | A Novel L-shaped MOSFET | Po-Hsieh Lin, Jyi-Tsong Lin | Nano Communication |
| 2011-10-01 | 期刊論文 | Additional-Body Effects in a Self-Aligned Deca-Nanometer Ultrathin-Body and Buried Oxide Silicon-On-Insulator Metal-Oxide Semiconductor Field-Effect Transistor: Three-Dimensional Simulation Study | Jyi-Tsong Lin, Yi-Chuen Eng, Cheng-Hsin Chen, and Yi-Hsuan Fan | Japanese Journal of Applied Physics |
| 2011-08-01 | 期刊論文 | A Three-Dimensional Simulation Study of Source/Drain-Tied Double-Gate Fin Field-Effect Transistor Design for 16-nm Half-Pitch Technology Generation and Beyond | Yi-Chuen Eng, Jyi-Tsong Lin, Tzu-Feng Chang, Chun-Yu Chen, Yi-Hsuan Fan, Cheng-Hsin Chen, and Po-Hsieh Lin | Japanese Journal of Applied Physics |
| 2011-05-01 | 期刊論文 | A New TFT with Trenched Body and Airgap-insulated Structure for Capacitorless 1T-DRAM Application | Cheng-Hsin Chen, Jyi-Tsong Lin, Tzu-Feng Chang, Yi-Chuen Eng, Po-Hsieh Lin, Yu-Che Chang | NANO COMMUNCATION |
| 2011-05-01 | 期刊論文 | Numerical Study of a Highly Scaled Bulk MOSFET With Block Oxide and Source/Drain-Tied Structure | Yi-Chuen Eng, Jyi-Tsong Lin, Senior Member, IEEE, Chih-Hao Kuo,Po-Hsieh Lin, Yi-Hsuan Fan, and Hsuan-Hsu Chen | IEEE TRANSACTIONS ON ELECTRON DEVICES |
| 2010-11-01 | 期刊論文 | A Novel Vertical MOSFET with bMPI Structure for 1T-DRAM Applications: A 2-D Numerical Study | Cheng-Hsin Chen, Jyi-Tsong Lin, Yi-Chuen Eng, Po-Hsieh Lin, Hsien-Nan Chiu, Tzu-Feng Chang | Integrated Ferroelectrics |
| 2010-11-01 | 期刊論文 | A Simulation Study of Junctionless Pseudo Tri-gate Vertical MOSFETs for RF/Analog Applications | Yu-Che Chang, Jyi-Tsong Lin, Yi-Chuen Eng | 奈米科技 |
| 2010-11-01 | 期刊論文 | An Influence of Temperature Variation for the DC and RF/analog Performance in a Novel Dual-Channel Source/Drain-Tied MOSFET | Yi-Hsuan Fan, Jyi-Tsong Lin, Yi-Chuen Eng | Integrated Ferroelectrics |
| 2010-11-01 | 期刊論文 | Electrical Characterization of 10-nm Π-Shaped S/D MOSFETs | Yi-Chuen Eng, Jyi-Tsong Lin, Yi-Hsuan Fan, Po-Hsieh Lin, Chih-Hao Kuo, Yu-Che Chang, Kuan-Yu Lu, Cheng-Hsien Chen, Chih-Hsuan T | Integrated Ferroelectrics |
| 2010-11-01 | 期刊論文 | RF Performance of the Novel STI-Type Body-Connected FinFET | Po-Hsieh Lin, Jyi-Tsong Lin, Yi-Chuen Eng | Integrated Ferroelectrics |
| 2010-11-01 | 期刊論文 | RF/Analog Performance of Novel Junctionless Vertical MOSFETs | Chih-Hsuan Tai, Jyi-Tsong Lin, Yi-Chuen Eng | Integrated Ferroelectrics |
| 2010-03-01 | 期刊論文 | Simulation-Based Study of Scalability of Gate-All-Around MOSFETs | Meng-Hsuch Chiang, Chun-Yu Chen and Jyi-Tsong Lin | NANO COMMUNCATION |
| 2009-11-01 | 期刊論文 | A New Novel Body-Connected FinFET | Po-Hsieh Lin, Jyi-Tsong Lin, Yi-Chuen Eng | Newsweek, NO.1 |
| 2008-11-01 | 期刊論文 | Performances of the Capacitorless 1T-DRAM using Polycrystalline Silicon Thin-Film Transistors with Trenched Body | Jyi-Tsong Lin, Kuo-Dong Huang and Bao-Tang Jheng | IEEE Electron Device Letters |
| 2008-09-01 | 期刊論文 | A High Performance Polysilicon Thin-Film Transistor Built on a Trenched Body | Jyi-Tsong Lin, and Kuo-Dong Huang | IEEE Transactions on Electron Devices |
| 2008-09-01 | 期刊論文 | Characteristics and Reliability of Polysilicon Thin-Film Transistor with Multiple Trench Body | Jyi-Tsong Lin,Kuo-Dong Huang, Bao-Tang Jheng | Semiconductor Science and Technology |
| 2008-06-01 | 期刊論文 | Short-Channel Characteristics of Self-Aligned pi-Shaped Source/Drain Ultrathin SOI MOSFETs | Jyi-Tsong Lin, Yi-Chuen Eng, Hau-Yuan Huang, Shiang-Shi Kang, Po-Hsieh Lin, Kung-Kai Kao, Jeng-Da Lin, Yi-Ming Tseng, Ying-Chieh Tsai, Hung-Jen Tseng | IEEE Transactions on Electron Devices |
| 2008-06-01 | 期刊論文 | Short-channel Characteristics of Self-aligned π-shaped Source/Drain Ultra-thin SOI MOSFETs | Jyi-Tsong Lin, Yi-Chuen Eng, Hau-Yuan Huang, Shiang-Shi Kang, Po-Hsieh Lin, Kung-Kai Kao, J | IEEE Transactions on Electron Devices |
| 2008-05-01 | 期刊論文 | A 2-D simulation study and characterization of a novel vertical SOI MOSFET with a smart source/ body tie,” Semiconductor Science and Technology | Jyi-Tsong Lin, Tai-Yi Lee, and Kao-Cheng Lin | Semiconductor Science and Technology |
| 2008-05-01 | 期刊論文 | Analysis of Block Oxide Height Variations for a 40nm Gate Length bFDSOI-FET | Jyi-Tsong Lin and Yi-Chuen Eng | Journal of Computers |
| 2008-05-01 | 期刊論文 | Non-classical polycrystalline silicon thin-film transistor with embedded block-oxide for suppressing short channel effect | Jyi-Tsong Lin, Kuo-Dong Huang, and Shu-Fen Hu | Semiconductor Science and Technology, |
| 2007-12-01 | 期刊論文 | A Novel Blocking Technology for Improving the Short-Channel Effects in Polycrystalline Silicon TFT Devices | Jyi-Tsong Lin, and Yi-Chuen Eng, | IEEE Transactions on Electron Devices |
| 2007-12-01 | 期刊論文 | The effect of a smart body tie on the bottom-gate thin film transistor | Jyi-Tsong Lin, Kuo-Dong Huang, Shu-Fen Hu | Solid-State Electronics |
| 2007-11-01 | 期刊論文 | A Non-Classical Polysilicon Thin-Film Transistor with Symmetric Trenched Body | Jyi-Tsong Lin, and Kuo-Dong Huang | Electronics Letters |
| 2007-11-01 | 期刊論文 | Influence of Block Oxide Width on a Silicon on Partial Insulator Field-Effect Transistor | Jyi-Tsong Lin, and Yi-Chuen Eng, | IEEE Transactions on Electron Devices |
| 2007-06-01 | 期刊論文 | The Effect of N-Channel Polysilicon Thin-Film Transistors with Body-Block Spacers | Jyi-Tsong Lin, Kuo-Dong Huang, and Shu-Fen Hu, | Solid-State Electronics, |
| 2007-05-01 | 期刊論文 | Source/Drain-Tied Poly-Si Thin-Film Transistor with Π-Shaped Active Region for Device Reliability Improvement | Jyi-Tsong Lin, and Yi-Chuen Eng | Journal of Applied Physics |
| 2007-02-01 | 期刊論文 | A Kink-Free Bottom Gate Poly-Si Thin-Film Transistor with Smart Body Tie, | Jyi-Tsong Lin, Kuo-Dong Huang and Shih-Tsong Lin, | ECS Transactions |
| 2007-01-01 | 期刊論文 | An Alleviated Self-heating Poly-Si Thin-Film Transistor Built on Non-continuing Buried Insulator, | Jyi-Tsong Lin, Kuo-Dong Huang, Chu-Lun Wu, | Electrochemical and Solid-State Letters, |
| 1992-08-01 | 期刊論文 | Analytical Current Characteristics Model of SOI MOSFET | Jyi-Tsong Lin and Ken G. Nichols | Research Journal |
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